drm/nouveau: restructure source tree, split core from drm implementation

Future work will be headed in the way of separating the policy supplied by
the nouveau drm module from the mechanisms provided by the driver core.

There will be a couple of major classes (subdev, engine) of driver modules
that have clearly defined tasks, and the further directory structure change
is to reflect this.

No code changes here whatsoever, aside from fixing up a couple of include
file pathnames.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/Makefile

@@ -3,45 +3,87 @@
 # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
 
 ccflags-y := -Iinclude/drm
-nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \
+ccflags-y += -I$(src)/core/include
+ccflags-y += -I$(src)
+
+nouveau-y := core/core/mm.o
+nouveau-y += core/core/ramht.o
+
+nouveau-y += core/subdev/fb/nv04.o
+nouveau-y += core/subdev/fb/nv10.o
+nouveau-y += core/subdev/fb/nv20.o
+nouveau-y += core/subdev/fb/nv30.o
+nouveau-y += core/subdev/fb/nv40.o
+nouveau-y += core/subdev/fb/nv50.o
+nouveau-y += core/subdev/fb/nvc0.o
+nouveau-y += core/subdev/fb/nv50_vram.o
+nouveau-y += core/subdev/fb/nvc0_vram.o
+nouveau-y += core/subdev/gpio/base.o
+nouveau-y += core/subdev/gpio/nv10.o
+nouveau-y += core/subdev/gpio/nv50.o
+nouveau-y += core/subdev/i2c/base.o
+nouveau-y += core/subdev/instmem/nv04.o
+nouveau-y += core/subdev/instmem/nv50.o
+nouveau-y += core/subdev/instmem/nvc0.o
+nouveau-y += core/subdev/mc/nv04.o
+nouveau-y += core/subdev/mc/nv40.o
+nouveau-y += core/subdev/mc/nv50.o
+nouveau-y += core/subdev/timer/nv04.o
+nouveau-y += core/subdev/vm/base.o
+nouveau-y += core/subdev/vm/nv50.o
+nouveau-y += core/subdev/vm/nvc0.o
+
+nouveau-y += core/engine/bsp/nv84.o
+nouveau-y += core/engine/copy/nva3.o
+nouveau-y += core/engine/copy/nvc0.o
+nouveau-y += core/engine/crypt/nv84.o
+nouveau-y += core/engine/crypt/nv98.o
+nouveau-y += core/engine/fifo/nv04.o
+nouveau-y += core/engine/fifo/nv10.o
+nouveau-y += core/engine/fifo/nv17.o
+nouveau-y += core/engine/fifo/nv40.o
+nouveau-y += core/engine/fifo/nv50.o
+nouveau-y += core/engine/fifo/nv84.o
+nouveau-y += core/engine/fifo/nvc0.o
+nouveau-y += core/engine/fifo/nve0.o
+nouveau-y += core/engine/graph/ctxnv40.o
+nouveau-y += core/engine/graph/ctxnv50.o
+nouveau-y += core/engine/graph/ctxnvc0.o
+nouveau-y += core/engine/graph/ctxnve0.o
+nouveau-y += core/engine/graph/nv04.o
+nouveau-y += core/engine/graph/nv10.o
+nouveau-y += core/engine/graph/nv20.o
+nouveau-y += core/engine/graph/nv40.o
+nouveau-y += core/engine/graph/nv50.o
+nouveau-y += core/engine/graph/nvc0.o
+nouveau-y += core/engine/graph/nve0.o
+nouveau-y += core/engine/mpeg/nv31.o
+nouveau-y += core/engine/mpeg/nv50.o
+nouveau-y += core/engine/ppp/nv98.o
+nouveau-y += core/engine/vp/nv84.o
+
+nouveau-y += nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \
              nouveau_gpuobj.o nouveau_irq.o nouveau_notifier.o \
              nouveau_sgdma.o nouveau_dma.o nouveau_util.o \
              nouveau_bo.o nouveau_fence.o nouveau_gem.o nouveau_ttm.o \
-             nouveau_hw.o nouveau_calc.o nouveau_bios.o nouveau_i2c.o \
+             nouveau_hw.o nouveau_calc.o \
              nouveau_display.o nouveau_connector.o nouveau_fbcon.o \
-             nouveau_hdmi.o nouveau_dp.o nouveau_ramht.o \
+             nouveau_hdmi.o nouveau_dp.o \
 	     nouveau_pm.o nouveau_volt.o nouveau_perf.o nouveau_temp.o \
-	     nouveau_mm.o nouveau_vm.o nouveau_mxm.o nouveau_gpio.o \
+	     nouveau_mxm.o \
 	     nouveau_abi16.o \
-             nv04_timer.o \
-             nv04_mc.o nv40_mc.o nv50_mc.o \
-             nv04_fb.o nv10_fb.o nv20_fb.o nv30_fb.o nv40_fb.o \
-             nv50_fb.o nvc0_fb.o \
-             nv04_fifo.o nv10_fifo.o nv17_fifo.o nv40_fifo.o nv50_fifo.o \
-             nv84_fifo.o nvc0_fifo.o nve0_fifo.o \
+	     nouveau_bios.o \
              nv04_fence.o nv10_fence.o nv84_fence.o nvc0_fence.o \
              nv04_software.o nv50_software.o nvc0_software.o \
-             nv04_graph.o nv10_graph.o nv20_graph.o \
-             nv40_graph.o nv50_graph.o nvc0_graph.o nve0_graph.o \
-             nv40_grctx.o nv50_grctx.o nvc0_grctx.o nve0_grctx.o \
-             nv84_crypt.o nv98_crypt.o \
-             nva3_copy.o nvc0_copy.o \
-             nv31_mpeg.o nv50_mpeg.o \
-             nv84_bsp.o \
-             nv84_vp.o \
-             nv98_ppp.o \
-             nv04_instmem.o nv50_instmem.o nvc0_instmem.o \
              nv04_dac.o nv04_dfp.o nv04_tv.o nv17_tv.o nv17_tv_modes.o \
              nv04_crtc.o nv04_display.o nv04_cursor.o \
              nv50_evo.o nv50_crtc.o nv50_dac.o nv50_sor.o \
              nv50_cursor.o nv50_display.o \
              nvd0_display.o \
              nv04_fbcon.o nv50_fbcon.o nvc0_fbcon.o \
-             nv10_gpio.o nv50_gpio.o \
 	     nv50_calc.o \
 	     nv04_pm.o nv40_pm.o nv50_pm.o nva3_pm.o nvc0_pm.o \
-	     nv50_vram.o nvc0_vram.o \
-	     nv50_vm.o nvc0_vm.o nouveau_prime.o
+	     nouveau_prime.o
 
 nouveau-$(CONFIG_DRM_NOUVEAU_DEBUG) += nouveau_debugfs.o
 nouveau-$(CONFIG_COMPAT) += nouveau_ioc32.o

drivers/gpu/drm/nouveau/nouveau_mm.c → drivers/gpu/drm/nouveau/core/core/mm.c

@@ -24,7 +24,7 @@
 
 #include "drmP.h"
 #include "nouveau_drv.h"
-#include "nouveau_mm.h"
+#include <core/mm.h>
 
 static inline void
 region_put(struct nouveau_mm *mm, struct nouveau_mm_node *a)

drivers/gpu/drm/nouveau/nouveau_ramht.c → drivers/gpu/drm/nouveau/core/core/ramht.c

@@ -25,7 +25,7 @@
 #include "drmP.h"
 
 #include "nouveau_drv.h"
-#include "nouveau_ramht.h"
+#include <core/ramht.h>
 
 static u32
 nouveau_ramht_hash_handle(struct nouveau_channel *chan, u32 handle)

drivers/gpu/drm/nouveau/nv84_bsp.c → drivers/gpu/drm/nouveau/core/engine/bsp/nv84.c

@@ -25,8 +25,8 @@
 #include "drmP.h"
 #include "nouveau_drv.h"
 #include "nouveau_util.h"
-#include "nouveau_vm.h"
-#include "nouveau_ramht.h"
+#include <subdev/vm.h>
+#include <core/ramht.h>
 
 /*XXX: This stub is currently used on NV98+ also, as soon as this becomes
  *     more than just an enable/disable stub this needs to be split out to

drivers/gpu/drm/nouveau/nva3_copy.c → drivers/gpu/drm/nouveau/core/engine/copy/nva3.c

@@ -26,9 +26,9 @@
 #include "drmP.h"
 #include "nouveau_drv.h"
 #include "nouveau_util.h"
-#include "nouveau_vm.h"
-#include "nouveau_ramht.h"
-#include "nva3_copy.fuc.h"
+#include <subdev/vm.h>
+#include <core/ramht.h>
+#include "fuc/nva3.fuc.h"
 
 struct nva3_copy_engine {
 	struct nouveau_exec_engine base;

drivers/gpu/drm/nouveau/nvc0_copy.c → drivers/gpu/drm/nouveau/core/engine/copy/nvc0.c

@@ -26,9 +26,9 @@
 #include "drmP.h"
 #include "nouveau_drv.h"
 #include "nouveau_util.h"
-#include "nouveau_vm.h"
-#include "nouveau_ramht.h"
-#include "nvc0_copy.fuc.h"
+#include <subdev/vm.h>
+#include <core/ramht.h>
+#include "fuc/nvc0.fuc.h"
 
 struct nvc0_copy_engine {
 	struct nouveau_exec_engine base;

drivers/gpu/drm/nouveau/nv84_crypt.c → drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c

@@ -25,8 +25,8 @@
 #include "drmP.h"
 #include "nouveau_drv.h"
 #include "nouveau_util.h"
-#include "nouveau_vm.h"
-#include "nouveau_ramht.h"
+#include <subdev/vm.h>
+#include <core/ramht.h>
 
 struct nv84_crypt_engine {
 	struct nouveau_exec_engine base;

drivers/gpu/drm/nouveau/nv98_crypt.c → drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c

@@ -26,10 +26,10 @@
 
 #include "nouveau_drv.h"
 #include "nouveau_util.h"
-#include "nouveau_vm.h"
-#include "nouveau_ramht.h"
+#include <subdev/vm.h>
+#include <core/ramht.h>
 
-#include "nv98_crypt.fuc.h"
+#include "fuc/nv98.fuc.h"
 
 struct nv98_crypt_priv {
 	struct nouveau_exec_engine base;

drivers/gpu/drm/nouveau/nv04_fifo.c → drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c

@@ -27,9 +27,9 @@
 #include "drmP.h"
 #include "drm.h"
 #include "nouveau_drv.h"
-#include "nouveau_fifo.h"
+#include <engine/fifo.h>
 #include "nouveau_util.h"
-#include "nouveau_ramht.h"
+#include <core/ramht.h>
 #include "nouveau_software.h"
 
 static struct ramfc_desc {

drivers/gpu/drm/nouveau/nv10_fifo.c → drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c

@@ -27,9 +27,9 @@
 #include "drmP.h"
 #include "drm.h"
 #include "nouveau_drv.h"
-#include "nouveau_fifo.h"
+#include <engine/fifo.h>
 #include "nouveau_util.h"
-#include "nouveau_ramht.h"
+#include <core/ramht.h>
 
 static struct ramfc_desc {
 	unsigned bits:6;

drivers/gpu/drm/nouveau/nv17_fifo.c → drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c

@@ -27,9 +27,9 @@
 #include "drmP.h"
 #include "drm.h"
 #include "nouveau_drv.h"
-#include "nouveau_fifo.h"
+#include <engine/fifo.h>
 #include "nouveau_util.h"
-#include "nouveau_ramht.h"
+#include <core/ramht.h>
 
 static struct ramfc_desc {
 	unsigned bits:6;

drivers/gpu/drm/nouveau/nv40_fifo.c → drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c

@@ -27,9 +27,9 @@
 #include "drmP.h"
 #include "drm.h"
 #include "nouveau_drv.h"
-#include "nouveau_fifo.h"
+#include <engine/fifo.h>
 #include "nouveau_util.h"
-#include "nouveau_ramht.h"
+#include <core/ramht.h>
 
 static struct ramfc_desc {
 	unsigned bits:6;

drivers/gpu/drm/nouveau/nv50_fifo.c → drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c

@@ -27,9 +27,9 @@
 #include "drmP.h"
 #include "drm.h"
 #include "nouveau_drv.h"
-#include "nouveau_fifo.h"
-#include "nouveau_ramht.h"
-#include "nouveau_vm.h"
+#include <engine/fifo.h>
+#include <core/ramht.h>
+#include <subdev/vm.h>
 
 struct nv50_fifo_priv {
 	struct nouveau_fifo_priv base;

drivers/gpu/drm/nouveau/nv84_fifo.c → drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c

@@ -27,9 +27,9 @@
 #include "drmP.h"
 #include "drm.h"
 #include "nouveau_drv.h"
-#include "nouveau_fifo.h"
-#include "nouveau_ramht.h"
-#include "nouveau_vm.h"
+#include <engine/fifo.h>
+#include <core/ramht.h>
+#include <subdev/vm.h>
 
 struct nv84_fifo_priv {
 	struct nouveau_fifo_priv base;

drivers/gpu/drm/nouveau/nvc0_fifo.c → drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c

@@ -25,8 +25,8 @@
 #include "drmP.h"
 
 #include "nouveau_drv.h"
-#include "nouveau_mm.h"
-#include "nouveau_fifo.h"
+#include <core/mm.h>
+#include <engine/fifo.h>
 
 static void nvc0_fifo_isr(struct drm_device *);
 

drivers/gpu/drm/nouveau/nve0_fifo.c → drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c

@@ -25,8 +25,8 @@
 #include "drmP.h"
 
 #include "nouveau_drv.h"
-#include "nouveau_mm.h"
-#include "nouveau_fifo.h"
+#include <core/mm.h>
+#include <engine/fifo.h>
 
 #define NVE0_FIFO_ENGINE_NUM 32
 

drivers/gpu/drm/nouveau/nv40_grctx.c → drivers/gpu/drm/nouveau/core/engine/graph/ctxnv40.c

@@ -111,7 +111,7 @@
 
 #include "drmP.h"
 #include "nouveau_drv.h"
-#include "nouveau_grctx.h"
+#include "ctx.h"
 
 /* TODO:
  *  - get vs count from 0x1540

drivers/gpu/drm/nouveau/nv50_grctx.c → drivers/gpu/drm/nouveau/core/engine/graph/ctxnv50.c

@@ -107,7 +107,7 @@
 
 #include "drmP.h"
 #include "nouveau_drv.h"
-#include "nouveau_grctx.h"
+#include "ctx.h"
 
 #define IS_NVA3F(x) (((x) > 0xa0 && (x) < 0xaa) || (x) == 0xaf)
 #define IS_NVAAF(x) ((x) >= 0xaa && (x) <= 0xac)

drivers/gpu/drm/nouveau/nvc0_grctx.c → drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c

@@ -24,8 +24,8 @@
 
 #include "drmP.h"
 #include "nouveau_drv.h"
-#include "nouveau_mm.h"
-#include "nvc0_graph.h"
+#include <core/mm.h>
+#include "nvc0.h"
 
 static void
 nv_icmd(struct drm_device *dev, u32 icmd, u32 data)

drivers/gpu/drm/nouveau/nve0_grctx.c → drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c

@@ -24,8 +24,8 @@
 
 #include "drmP.h"
 #include "nouveau_drv.h"
-#include "nouveau_mm.h"
-#include "nve0_graph.h"
+#include <core/mm.h>
+#include "nve0.h"
 
 static void
 nv_icmd(struct drm_device *dev, u32 icmd, u32 data)

drivers/gpu/drm/nouveau/nv04_graph.c → drivers/gpu/drm/nouveau/core/engine/graph/nv04.c

@@ -28,7 +28,7 @@
 #include "nouveau_drv.h"
 #include "nouveau_hw.h"
 #include "nouveau_util.h"
-#include "nouveau_ramht.h"
+#include <core/ramht.h>
 
 struct nv04_graph_engine {
 	struct nouveau_exec_engine base;

drivers/gpu/drm/nouveau/nv40_graph.c → drivers/gpu/drm/nouveau/core/engine/graph/nv40.c

@@ -27,8 +27,8 @@
 #include "drmP.h"
 #include "drm.h"
 #include "nouveau_drv.h"
-#include "nouveau_fifo.h"
-#include "nouveau_ramht.h"
+#include <engine/fifo.h>
+#include <core/ramht.h>
 
 struct nv40_graph_engine {
 	struct nouveau_exec_engine base;

drivers/gpu/drm/nouveau/nv50_graph.c → drivers/gpu/drm/nouveau/core/engine/graph/nv50.c

@@ -27,10 +27,10 @@
 #include "drmP.h"
 #include "drm.h"
 #include "nouveau_drv.h"
-#include "nouveau_fifo.h"
-#include "nouveau_ramht.h"
+#include <engine/fifo.h>
+#include <core/ramht.h>
 #include "nouveau_dma.h"
-#include "nouveau_vm.h"
+#include <subdev/vm.h>
 #include "nv50_evo.h"
 
 struct nv50_graph_engine {

drivers/gpu/drm/nouveau/nvc0_graph.c → drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c

@@ -28,12 +28,12 @@
 #include "drmP.h"
 
 #include "nouveau_drv.h"
-#include "nouveau_mm.h"
-#include "nouveau_fifo.h"
+#include <core/mm.h>
+#include <engine/fifo.h>
 
-#include "nvc0_graph.h"
-#include "nvc0_grhub.fuc.h"
-#include "nvc0_grgpc.fuc.h"
+#include "nvc0.h"
+#include "fuc/hubnvc0.fuc.h"
+#include "fuc/gpcnvc0.fuc.h"
 
 static void
 nvc0_graph_ctxctl_debug_unit(struct drm_device *dev, u32 base)

drivers/gpu/drm/nouveau/nve0_graph.c → drivers/gpu/drm/nouveau/core/engine/graph/nve0.c

@@ -28,10 +28,10 @@
 #include "drmP.h"
 
 #include "nouveau_drv.h"
-#include "nouveau_mm.h"
-#include "nouveau_fifo.h"
+#include <core/mm.h>
+#include <engine/fifo.h>
 
-#include "nve0_graph.h"
+#include "nve0.h"
 
 static void
 nve0_graph_ctxctl_debug_unit(struct drm_device *dev, u32 base)