dts: vt8500: Fix errors in SDHC node for WM8505

According to datasheet, the registers space of SDHC controller is 1Kb, not '0x1000', the correct value should be '0x400'. Bracket interrupt numbers individually per recommendations. Signed-off-by: Roman Volkov <rvolkov@v1ros.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
git-mirror · Jan 7, 2016 · 03b9ee4 · 03b9ee4
1 parent 9962b3d
commit 03b9ee4
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
@@ -281,8 +281,8 @@
 
 		sdhc@d800a000 {
 			compatible = "wm,wm8505-sdhc";
-			reg = <0xd800a000 0x1000>;
-			interrupts = <20 21>;
+			reg = <0xd800a000 0x400>;
+			interrupts = <20>, <21>;
 			clocks = <&clksdhc>;
 			bus-width = <4>;
 		};