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r: 145763
b: refs/heads/master
c: 48c72d1
h: refs/heads/master
i:
  145761: 611ba19
  145759: ab6ef6e
v: v3
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Linus Torvalds committed Jun 10, 2009
1 parent 7bc366a commit 03e23b7
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2 changes: 1 addition & 1 deletion [refs]
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refs/heads/master: aeef50bc0483fa70ce0bddb686ec84a274b7f3d4
refs/heads/master: 48c72d1ab4ec86789a23aed0b0b5f31ac083c0c6
18 changes: 18 additions & 0 deletions trunk/Documentation/ABI/testing/sysfs-devices-cache_disable
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What: /sys/devices/system/cpu/cpu*/cache/index*/cache_disable_X
Date: August 2008
KernelVersion: 2.6.27
Contact: mark.langsdorf@amd.com
Description: These files exist in every cpu's cache index directories.
There are currently 2 cache_disable_# files in each
directory. Reading from these files on a supported
processor will return that cache disable index value
for that processor and node. Writing to one of these
files will cause the specificed cache index to be disabled.

Currently, only AMD Family 10h Processors support cache index
disable, and only for their L3 caches. See the BIOS and
Kernel Developer's Guide at
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116-Public-GH-BKDG_3.20_2-4-09.pdf
for formatting information and other details on the
cache index disable.
Users: joachim.deguara@amd.com
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