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yaml
---
r: 114553
b: refs/heads/master
c: c2fe594
h: refs/heads/master
i:
  114551: 023d440
v: v3
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Timur Tabi authored and Kumar Gala committed Sep 17, 2008
1 parent 7cb6e28 commit 03faebb
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Showing 3 changed files with 21 additions and 4 deletions.
2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: f1eaf16a9e843aa915b86594b60ec6cd66c9eac7
refs/heads/master: c2fe59444e1827ecd2713a1e6ecfd1ab1fc548ae
15 changes: 15 additions & 0 deletions trunk/Documentation/powerpc/dts-bindings/fsl/ssi.txt
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Expand Up @@ -24,6 +24,12 @@ Required properties:
"rj-master" - r.j., SSI is clock master
"ac97-slave" - AC97 mode, SSI is clock slave
"ac97-master" - AC97 mode, SSI is clock master
- fsl,playback-dma: phandle to a DMA node for the DMA channel to use for
playback of audio. This is typically dictated by SOC
design. See the notes below.
- fsl,capture-dma: phandle to a DMA node for the DMA channel to use for
capture (recording) of audio. This is typically dictated
by SOC design. See the notes below.

Optional properties:
- codec-handle : phandle to a 'codec' node that defines an audio
Expand All @@ -36,3 +42,12 @@ Child 'codec' node required properties:
Child 'codec' node optional properties:
- clock-frequency : The frequency of the input clock, which typically
comes from an on-board dedicated oscillator.

Notes on fsl,playback-dma and fsl,capture-dma:

On SOCs that have an SSI, specific DMA channels are hard-wired for playback
and capture. On the MPC8610, for example, SSI1 must use DMA channel 0 for
playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for
playback and DMA channel 3 for capture. The developer can choose which
DMA controller to use, but the channels themselves are hard-wired. The
purpose of these two properties is to represent this hardware design.
8 changes: 5 additions & 3 deletions trunk/arch/powerpc/boot/dts/mpc8610_hpcd.dts
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Expand Up @@ -207,14 +207,16 @@
reg = <0xe4000 0x100>;
};

i2s@16000 {
ssi@16000 {
compatible = "fsl,mpc8610-ssi";
cell-index = <0>;
reg = <0x16000 0x100>;
interrupt-parent = <&mpic>;
interrupts = <62 2>;
fsl,mode = "i2s-slave";
codec-handle = <&cs4270>;
fsl,playback-dma = <&dma00>;
fsl,capture-dma = <&dma01>;
};

ssi@16100 {
Expand All @@ -233,15 +235,15 @@
reg = <0x21300 0x4>; /* DMA general status register */
ranges = <0x0 0x21100 0x200>;

dma-channel@0 {
dma00: dma-channel@0 {
compatible = "fsl,mpc8610-dma-channel",
"fsl,eloplus-dma-channel";
cell-index = <0>;
reg = <0x0 0x80>;
interrupt-parent = <&mpic>;
interrupts = <20 2>;
};
dma-channel@1 {
dma01: dma-channel@1 {
compatible = "fsl,mpc8610-dma-channel",
"fsl,eloplus-dma-channel";
cell-index = <1>;
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