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ARM: OMAP: Fix McBSP spin_lock deadlock
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A spin_lock deadlock will occur when omap_mcbsp_request() is invoked.

omap_mcbsp_request()
\- clk_enable(mcbsp->clk)         [takes and holds clockfw_lock]
    \- omap2_clk_enable()
       \- _omap2_clk_enable()
           \- omap_mcbsp_clk_enable()
              \- clk_enable(child clock)   [tries for clockfw_lock again]

mcbsp_clk is a virtual clock and it comprises several child clocks. when
enable mcbsp_clk in omap_mcbsp_request(), the enable function of mcbsp_clk
will enable its child clocks, then the deadlock occurs.

The solution is to remove the virtual clock and enable these child clocks in
omap_mcbsp_request() directly.

Signed-off-by: Stanley.Miao <stanley.miao@windriver.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Stanley.Miao authored and Tony Lindgren committed Jan 29, 2009
1 parent 18e352e commit 0615115
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Showing 4 changed files with 78 additions and 223 deletions.
98 changes: 10 additions & 88 deletions arch/arm/mach-omap1/mcbsp.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -28,81 +28,8 @@
#define DPS_RSTCT2_PER_EN (1 << 0)
#define DSP_RSTCT2_WD_PER_EN (1 << 1)

struct mcbsp_internal_clk {
struct clk clk;
struct clk **childs;
int n_childs;
};

#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
{
const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" };
int i;

mclk->n_childs = ARRAY_SIZE(clk_names);
mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
GFP_KERNEL);

for (i = 0; i < mclk->n_childs; i++) {
/* We fake a platform device to get correct device id */
struct platform_device pdev;

pdev.dev.bus = &platform_bus_type;
pdev.id = mclk->clk.id;
mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
if (IS_ERR(mclk->childs[i]))
printk(KERN_ERR "Could not get clock %s (%d).\n",
clk_names[i], mclk->clk.id);
}
}

static int omap_mcbsp_clk_enable(struct clk *clk)
{
struct mcbsp_internal_clk *mclk = container_of(clk,
struct mcbsp_internal_clk, clk);
int i;

for (i = 0; i < mclk->n_childs; i++)
clk_enable(mclk->childs[i]);
return 0;
}

static void omap_mcbsp_clk_disable(struct clk *clk)
{
struct mcbsp_internal_clk *mclk = container_of(clk,
struct mcbsp_internal_clk, clk);
int i;

for (i = 0; i < mclk->n_childs; i++)
clk_disable(mclk->childs[i]);
}

static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
{
.clk = {
.name = "mcbsp_clk",
.id = 1,
.enable = omap_mcbsp_clk_enable,
.disable = omap_mcbsp_clk_disable,
},
},
{
.clk = {
.name = "mcbsp_clk",
.id = 3,
.enable = omap_mcbsp_clk_enable,
.disable = omap_mcbsp_clk_disable,
},
},
};

#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks)
#else
#define omap_mcbsp_clks_size 0
static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
static inline void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
{ }
const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" };
#endif

static void omap1_mcbsp_request(unsigned int id)
Expand Down Expand Up @@ -167,8 +94,9 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
.rx_irq = INT_McBSP1RX,
.tx_irq = INT_McBSP1TX,
.ops = &omap1_mcbsp_ops,
.clk_name = "mcbsp_clk",
},
.clk_names = clk_names,
.num_clks = 3,
},
{
.phys_base = OMAP1510_MCBSP2_BASE,
.dma_rx_sync = OMAP_DMA_MCBSP2_RX,
Expand All @@ -184,7 +112,8 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
.rx_irq = INT_McBSP3RX,
.tx_irq = INT_McBSP3TX,
.ops = &omap1_mcbsp_ops,
.clk_name = "mcbsp_clk",
.clk_names = clk_names,
.num_clks = 3,
},
};
#define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata)
Expand All @@ -202,7 +131,8 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
.rx_irq = INT_McBSP1RX,
.tx_irq = INT_McBSP1TX,
.ops = &omap1_mcbsp_ops,
.clk_name = "mcbsp_clk",
.clk_names = clk_names,
.num_clks = 3,
},
{
.phys_base = OMAP1610_MCBSP2_BASE,
Expand All @@ -219,7 +149,8 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
.rx_irq = INT_McBSP3RX,
.tx_irq = INT_McBSP3TX,
.ops = &omap1_mcbsp_ops,
.clk_name = "mcbsp_clk",
.clk_names = clk_names,
.num_clks = 3,
},
};
#define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata)
Expand All @@ -230,15 +161,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {

int __init omap1_mcbsp_init(void)
{
int i;

for (i = 0; i < omap_mcbsp_clks_size; i++) {
if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
clk_register(&omap_mcbsp_clks[i].clk);
}
}

if (cpu_is_omap730())
omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ;
if (cpu_is_omap15xx())
Expand Down
145 changes: 25 additions & 120 deletions arch/arm/mach-omap2/mcbsp.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -24,106 +24,7 @@
#include <mach/cpu.h>
#include <mach/mcbsp.h>

struct mcbsp_internal_clk {
struct clk clk;
struct clk **childs;
int n_childs;
};

#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
{
const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
int i;

mclk->n_childs = ARRAY_SIZE(clk_names);
mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
GFP_KERNEL);

for (i = 0; i < mclk->n_childs; i++) {
/* We fake a platform device to get correct device id */
struct platform_device pdev;

pdev.dev.bus = &platform_bus_type;
pdev.id = mclk->clk.id;
mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
if (IS_ERR(mclk->childs[i]))
printk(KERN_ERR "Could not get clock %s (%d).\n",
clk_names[i], mclk->clk.id);
}
}

static int omap_mcbsp_clk_enable(struct clk *clk)
{
struct mcbsp_internal_clk *mclk = container_of(clk,
struct mcbsp_internal_clk, clk);
int i;

for (i = 0; i < mclk->n_childs; i++)
clk_enable(mclk->childs[i]);
return 0;
}

static void omap_mcbsp_clk_disable(struct clk *clk)
{
struct mcbsp_internal_clk *mclk = container_of(clk,
struct mcbsp_internal_clk, clk);
int i;

for (i = 0; i < mclk->n_childs; i++)
clk_disable(mclk->childs[i]);
}

static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
{
.clk = {
.name = "mcbsp_clk",
.id = 1,
.enable = omap_mcbsp_clk_enable,
.disable = omap_mcbsp_clk_disable,
},
},
{
.clk = {
.name = "mcbsp_clk",
.id = 2,
.enable = omap_mcbsp_clk_enable,
.disable = omap_mcbsp_clk_disable,
},
},
{
.clk = {
.name = "mcbsp_clk",
.id = 3,
.enable = omap_mcbsp_clk_enable,
.disable = omap_mcbsp_clk_disable,
},
},
{
.clk = {
.name = "mcbsp_clk",
.id = 4,
.enable = omap_mcbsp_clk_enable,
.disable = omap_mcbsp_clk_disable,
},
},
{
.clk = {
.name = "mcbsp_clk",
.id = 5,
.enable = omap_mcbsp_clk_enable,
.disable = omap_mcbsp_clk_disable,
},
},
};

#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks)
#else
#define omap_mcbsp_clks_size 0
static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
static inline void omap_mcbsp_clk_init(struct clk *clk)
{ }
#endif
const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };

static void omap2_mcbsp2_mux_setup(void)
{
Expand Down Expand Up @@ -156,7 +57,8 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
.ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk",
.clk_names = clk_names,
.num_clks = 2,
},
{
.phys_base = OMAP24XX_MCBSP2_BASE,
Expand All @@ -165,7 +67,8 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
.ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk",
.clk_names = clk_names,
.num_clks = 2,
},
};
#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata)
Expand All @@ -183,7 +86,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
.ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk",
.clk_names = clk_names,
.num_clks = 2,
},
{
.phys_base = OMAP24XX_MCBSP2_BASE,
Expand All @@ -192,7 +96,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
.ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk",
.clk_names = clk_names,
.num_clks = 2,
},
{
.phys_base = OMAP2430_MCBSP3_BASE,
Expand All @@ -201,7 +106,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
.ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk",
.clk_names = clk_names,
.num_clks = 2,
},
{
.phys_base = OMAP2430_MCBSP4_BASE,
Expand All @@ -210,7 +116,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
.ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk",
.clk_names = clk_names,
.num_clks = 2,
},
{
.phys_base = OMAP2430_MCBSP5_BASE,
Expand All @@ -219,7 +126,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP5_IRQ_RX,
.tx_irq = INT_24XX_MCBSP5_IRQ_TX,
.ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk",
.clk_names = clk_names,
.num_clks = 2,
},
};
#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata)
Expand All @@ -237,7 +145,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
.ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk",
.clk_names = clk_names,
.num_clks = 2,
},
{
.phys_base = OMAP34XX_MCBSP2_BASE,
Expand All @@ -246,7 +155,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
.ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk",
.clk_names = clk_names,
.num_clks = 2,
},
{
.phys_base = OMAP34XX_MCBSP3_BASE,
Expand All @@ -255,7 +165,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
.ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk",
.clk_names = clk_names,
.num_clks = 2,
},
{
.phys_base = OMAP34XX_MCBSP4_BASE,
Expand All @@ -264,7 +175,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
.ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk",
.clk_names = clk_names,
.num_clks = 2,
},
{
.phys_base = OMAP34XX_MCBSP5_BASE,
Expand All @@ -273,7 +185,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP5_IRQ_RX,
.tx_irq = INT_24XX_MCBSP5_IRQ_TX,
.ops = &omap2_mcbsp_ops,
.clk_name = "mcbsp_clk",
.clk_names = clk_names,
.num_clks = 2,
},
};
#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata)
Expand All @@ -284,14 +197,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {

static int __init omap2_mcbsp_init(void)
{
int i;

for (i = 0; i < omap_mcbsp_clks_size; i++) {
/* Once we call clk_get inside init, we do not register it */
omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
clk_register(&omap_mcbsp_clks[i].clk);
}

if (cpu_is_omap2420())
omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
if (cpu_is_omap2430())
Expand Down
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