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yaml
---
r: 365214
b: refs/heads/master
c: 68792e2
h: refs/heads/master
v: v3
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Jonas Gorski authored and Mark Brown committed Mar 12, 2013
1 parent 0bf58aa commit 06fc88e
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Showing 2 changed files with 3 additions and 6 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: c94df49542a9cf2c095468e62be6a16ba86dd811
refs/heads/master: 68792e2a1989bf34a9498356c3e3cc70b9231df2
7 changes: 2 additions & 5 deletions trunk/drivers/spi/spi-bcm63xx.c
Original file line number Diff line number Diff line change
Expand Up @@ -97,15 +97,12 @@ static void bcm63xx_spi_setup_transfer(struct spi_device *spi,
struct spi_transfer *t)
{
struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
u32 hz;
u8 clk_cfg, reg;
int i;

hz = (t) ? t->speed_hz : spi->max_speed_hz;

/* Find the closest clock configuration */
for (i = 0; i < SPI_CLK_MASK; i++) {
if (hz >= bcm63xx_spi_freq_table[i][0]) {
if (t->speed_hz >= bcm63xx_spi_freq_table[i][0]) {
clk_cfg = bcm63xx_spi_freq_table[i][1];
break;
}
Expand All @@ -122,7 +119,7 @@ static void bcm63xx_spi_setup_transfer(struct spi_device *spi,

bcm_spi_writeb(bs, reg, SPI_CLK_CFG);
dev_dbg(&spi->dev, "Setting clock register to %02x (hz %d)\n",
clk_cfg, hz);
clk_cfg, t->speed_hz);
}

/* the spi->mode bits understood by this driver: */
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