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staging: gma500: Intel GMA500 staging driver
This is an initial staging driver for the GMA500. It's been stripped out of the PVR drivers and crunched together from various bits of code and different kernels. Currently it's unaccelerated but still pretty snappy even compositing with the frame buffer X server. Lots of work is needed to rework the ttm and bo interfaces from being ripped out and then 2D acceleration wants putting back for framebuffer and somehow eventually via DRM. There is no support for the parts without open source userspace (video accelerators, 3D) as per kernel policy. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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Alan Cox
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Greg Kroah-Hartman
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Feb 23, 2011
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config DRM_PSB | ||
tristate "Intel GMA500 KMS Framebuffer" | ||
depends on DRM && PCI | ||
select FB_CFB_COPYAREA | ||
select FB_CFB_FILLRECT | ||
select FB_CFB_IMAGEBLIT | ||
select DRM_KMS_HELPER | ||
select DRM_TTM | ||
help | ||
Say yes for an experimental KMS framebuffer driver for the | ||
Intel GMA500 ('Poulsbo') graphics support. | ||
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# | ||
# KMS driver for the GMA500 | ||
# | ||
ccflags-y += -Iinclude/drm | ||
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psb_gfx-y += psb_bl.o \ | ||
psb_drv.o \ | ||
psb_fb.o \ | ||
psb_gtt.o \ | ||
psb_intel_bios.o \ | ||
psb_intel_opregion.o \ | ||
psb_intel_display.o \ | ||
psb_intel_i2c.o \ | ||
psb_intel_lvds.o \ | ||
psb_intel_modes.o \ | ||
psb_intel_sdvo.o \ | ||
psb_reset.o \ | ||
psb_sgx.o \ | ||
psb_pvr_glue.o \ | ||
psb_buffer.o \ | ||
psb_fence.o \ | ||
psb_mmu.o \ | ||
psb_ttm_glue.o \ | ||
psb_ttm_fence.o \ | ||
psb_ttm_fence_user.o \ | ||
psb_ttm_placement_user.o \ | ||
psb_powermgmt.o \ | ||
psb_irq.o | ||
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obj-$(CONFIG_DRM_PSB) += psb_gfx.o |
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- Test on more platforms | ||
- Clean up the various chunks of unused code | ||
- Sort out the power management side. Not important for Poulsbo but | ||
matters for Moorestown | ||
- Add Moorestown support (single pipe, no BIOS, no stolen memory, | ||
some other differences) | ||
- Sort out the bo and ttm code to support userframe buffers and DRM | ||
interfaces rather than just faking it enough for a framebuffer | ||
- Add 2D acceleration via console and DRM | ||
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As per kernel policy and the in the interest of the safety of various | ||
kittens there is no support or plans to add hooks for the closed user space | ||
stuff. | ||
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Why bother ? | ||
- Proper display configuration | ||
- Can be made to work on Moorestown where VESA won't | ||
- Works on systems where the VESA BIOS is bust or the tables are broken | ||
without hacks | ||
- 2D acceleration | ||
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Currently tested on | ||
+ Dell Mini 10 100x600 | ||
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/* | ||
* psb backlight using HAL | ||
* | ||
* Copyright (c) 2009, Intel Corporation. | ||
* | ||
* This program is free software; you can redistribute it and/or modify it | ||
* under the terms and conditions of the GNU General Public License, | ||
* version 2, as published by the Free Software Foundation. | ||
* | ||
* This program is distributed in the hope it will be useful, but WITHOUT | ||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
* more details. | ||
* | ||
* You should have received a copy of the GNU General Public License along with | ||
* this program; if not, write to the Free Software Foundation, Inc., | ||
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
* | ||
* Authors: Eric Knopp | ||
* | ||
*/ | ||
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#include <linux/backlight.h> | ||
#include <linux/version.h> | ||
#include "psb_drv.h" | ||
#include "psb_intel_reg.h" | ||
#include "psb_intel_drv.h" | ||
#include "psb_intel_bios.h" | ||
#include "psb_powermgmt.h" | ||
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#define MRST_BLC_MAX_PWM_REG_FREQ 0xFFFF | ||
#define BLC_PWM_PRECISION_FACTOR 100 /* 10000000 */ | ||
#define BLC_PWM_FREQ_CALC_CONSTANT 32 | ||
#define MHz 1000000 | ||
#define BRIGHTNESS_MIN_LEVEL 1 | ||
#define BRIGHTNESS_MAX_LEVEL 100 | ||
#define BRIGHTNESS_MASK 0xFF | ||
#define BLC_POLARITY_NORMAL 0 | ||
#define BLC_POLARITY_INVERSE 1 | ||
#define BLC_ADJUSTMENT_MAX 100 | ||
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#define PSB_BLC_PWM_PRECISION_FACTOR 10 | ||
#define PSB_BLC_MAX_PWM_REG_FREQ 0xFFFE | ||
#define PSB_BLC_MIN_PWM_REG_FREQ 0x2 | ||
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#define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE) | ||
#define PSB_BACKLIGHT_PWM_CTL_SHIFT (16) | ||
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static int psb_brightness; | ||
static struct backlight_device *psb_backlight_device; | ||
static u8 blc_brightnesscmd; | ||
static u8 blc_pol; | ||
static u8 blc_type; | ||
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int psb_set_brightness(struct backlight_device *bd) | ||
{ | ||
struct drm_device *dev = bl_get_data(psb_backlight_device); | ||
int level = bd->props.brightness; | ||
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DRM_DEBUG_DRIVER("backlight level set to %d\n", level); | ||
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/* Perform value bounds checking */ | ||
if (level < BRIGHTNESS_MIN_LEVEL) | ||
level = BRIGHTNESS_MIN_LEVEL; | ||
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psb_intel_lvds_set_brightness(dev, level); | ||
psb_brightness = level; | ||
return 0; | ||
} | ||
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int psb_get_brightness(struct backlight_device *bd) | ||
{ | ||
DRM_DEBUG_DRIVER("brightness = 0x%x\n", psb_brightness); | ||
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/* return locally cached var instead of HW read (due to DPST etc.) */ | ||
return psb_brightness; | ||
} | ||
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static const struct backlight_ops psb_ops = { | ||
.get_brightness = psb_get_brightness, | ||
.update_status = psb_set_brightness, | ||
}; | ||
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static int device_backlight_init(struct drm_device *dev) | ||
{ | ||
unsigned long CoreClock; | ||
/* u32 bl_max_freq; */ | ||
/* unsigned long value; */ | ||
u16 bl_max_freq; | ||
uint32_t value; | ||
uint32_t blc_pwm_precision_factor; | ||
struct drm_psb_private *dev_priv = dev->dev_private; | ||
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/* get bl_max_freq and pol from dev_priv*/ | ||
if (!dev_priv->lvds_bl) { | ||
DRM_ERROR("Has no valid LVDS backlight info\n"); | ||
return 1; | ||
} | ||
bl_max_freq = dev_priv->lvds_bl->freq; | ||
blc_pol = dev_priv->lvds_bl->pol; | ||
blc_pwm_precision_factor = PSB_BLC_PWM_PRECISION_FACTOR; | ||
blc_brightnesscmd = dev_priv->lvds_bl->brightnesscmd; | ||
blc_type = dev_priv->lvds_bl->type; | ||
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CoreClock = dev_priv->core_freq; | ||
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value = (CoreClock * MHz) / BLC_PWM_FREQ_CALC_CONSTANT; | ||
value *= blc_pwm_precision_factor; | ||
value /= bl_max_freq; | ||
value /= blc_pwm_precision_factor; | ||
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if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, | ||
OSPM_UHB_ONLY_IF_ON)) { | ||
/* Check: may be MFLD only */ | ||
if ( | ||
value > (unsigned long long)PSB_BLC_MAX_PWM_REG_FREQ || | ||
value < (unsigned long long)PSB_BLC_MIN_PWM_REG_FREQ) | ||
return 2; | ||
else { | ||
value &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR; | ||
REG_WRITE(BLC_PWM_CTL, | ||
(value << PSB_BACKLIGHT_PWM_CTL_SHIFT) | | ||
(value)); | ||
} | ||
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND); | ||
} | ||
return 0; | ||
} | ||
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int psb_backlight_init(struct drm_device *dev) | ||
{ | ||
#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE | ||
int ret = 0; | ||
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struct backlight_properties props; | ||
memset(&props, 0, sizeof(struct backlight_properties)); | ||
props.max_brightness = BRIGHTNESS_MAX_LEVEL; | ||
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psb_backlight_device = backlight_device_register("psb-bl", NULL, | ||
(void *)dev, &psb_ops, &props); | ||
if (IS_ERR(psb_backlight_device)) | ||
return PTR_ERR(psb_backlight_device); | ||
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ret = device_backlight_init(dev); | ||
if (ret < 0) | ||
return ret; | ||
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psb_backlight_device->props.brightness = BRIGHTNESS_MAX_LEVEL; | ||
psb_backlight_device->props.max_brightness = BRIGHTNESS_MAX_LEVEL; | ||
backlight_update_status(psb_backlight_device); | ||
#endif | ||
return 0; | ||
} | ||
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void psb_backlight_exit(void) | ||
{ | ||
#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE | ||
psb_backlight_device->props.brightness = 0; | ||
backlight_update_status(psb_backlight_device); | ||
backlight_device_unregister(psb_backlight_device); | ||
#endif | ||
} | ||
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struct backlight_device *psb_get_backlight_device(void) | ||
{ | ||
return psb_backlight_device; | ||
} |
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