---

yaml
---
r: 57957
b: refs/heads/master
c: 4bf3f3c
h: refs/heads/master
i:
  57955: c2924c2
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 4beb2584be3cf1d4fc7a222b0f747735da8e3c91
+refs/heads/master: 4bf3f3cbb6add01d3e6a18c73f594b73113b14f2

trunk/arch/blackfin/lib/memcmp.S

@@ -61,7 +61,12 @@ ENTRY(_memcmp)
 
 	LSETUP (.Lquad_loop_s, .Lquad_loop_e) LC0=P1;
 .Lquad_loop_s:
+#ifdef ANOMALY_05000202
+	R0 = [P0++];
+	R1 = [I0++];
+#else
 	MNOP || R0 = [P0++] || R1 = [I0++];
+#endif
 	CC = R0 == R1;
 	IF !CC JUMP .Lquad_different;
 .Lquad_loop_e:

trunk/arch/blackfin/lib/memcpy.S

@@ -94,13 +94,20 @@ ENTRY(_memcpy)
 .Lmore_than_seven:
 	/* There's at least eight bytes to copy. */
 	P2 += -1;	/* because we unroll one iteration */
-	LSETUP(.Lword_loop, .Lword_loop) LC0=P2;
+	LSETUP(.Lword_loops, .Lword_loope) LC0=P2;
 	R0 = R1;
 	I1 = P1;
 	R3 = [I1++];
-.Lword_loop:
+#ifdef ANOMALY_05000202
+.Lword_loops:
+	[P0++] = R3;
+.Lword_loope:
+	R3 = [I1++];
+#else
+.Lword_loops:
+.Lword_loope:
 	MNOP || [P0++] = R3 || R3 = [I1++];
-
+#endif
 	[P0++] = R3;
 	/* Any remaining bytes to copy? */
 	R3 = 0x3;

trunk/arch/blackfin/lib/memmove.S

@@ -69,8 +69,17 @@ ENTRY(_memmove)
 	P2 = R2;                  /* set remainder */
 	R1 = [I0++];
 
-	LSETUP (.Lquad_loop, .Lquad_loop) LC0=P1;
-.Lquad_loop: MNOP || [P0++] = R1 || R1 = [I0++];
+	LSETUP (.Lquad_loops, .Lquad_loope) LC0=P1;
+#ifdef ANOMALY_05000202
+.Lquad_loops:
+	[P0++] = R1;
+.Lquad_loope:
+	R1 = [I0++];
+#else
+.Lquad_loops:
+.Lquad_loope:
+	 MNOP || [P0++] = R1 || R1 = [I0++];
+#endif
 	[P0++] = R1;
 
 	CC = P2 == 0;             /* any remaining bytes? */
@@ -93,6 +102,10 @@ ENTRY(_memmove)
 	R1 = B[P3--] (Z);
 	CC = P2 == 0;
 	IF CC JUMP .Lno_loop;
+#ifdef ANOMALY_05000245
+	NOP;
+	NOP;
+#endif
 	LSETUP (.Lol_s, .Lol_e) LC0 = P2;
 .Lol_s:    B[P0--] = R1;
 .Lol_e:    R1 = B[P3--] (Z);

trunk/arch/blackfin/mach-common/cache.S

@@ -123,14 +123,14 @@ ENTRY(_blackfin_icache_flush_range)
 	R2 = R0 & R2;
 	P0 = R2;
 	P1 = R1;
-	CSYNC;
+	CSYNC(R3);
 	IFLUSH [P0];
 1:
 	IFLUSH [P0++];
 	CC = P0 < P1 (iu);
 	IF CC JUMP 1b (bp);
 	IFLUSH [P0];
-	SSYNC;
+	SSYNC(R3);
 	RTS;
 ENDPROC(_blackfin_icache_flush_range)
 
@@ -148,7 +148,7 @@ ENTRY(_blackfin_icache_dcache_flush_range)
 	R2 = R0 & R2;
 	P0 = R2;
 	P1 = R1;
-	CSYNC;
+	CSYNC(R3);
 	IFLUSH [P0];
 1:
 	FLUSH [P0];
@@ -157,7 +157,7 @@ ENTRY(_blackfin_icache_dcache_flush_range)
 	IF CC JUMP 1b (bp);
 	IFLUSH [P0];
 	FLUSH [P0];
-	SSYNC;
+	SSYNC(R3);
 	RTS;
 ENDPROC(_blackfin_icache_dcache_flush_range)
 
@@ -174,7 +174,7 @@ ENTRY(_blackfin_dcache_invalidate_range)
 	R2 = R0 & R2;
 	P0 = R2;
 	P1 = R1;
-	CSYNC;
+	CSYNC(R3);
 	FLUSHINV[P0];
 1:
 	FLUSHINV[P0++];
@@ -186,7 +186,7 @@ ENTRY(_blackfin_dcache_invalidate_range)
 	 * so do one more.
 	 */
 	FLUSHINV[P0];
-	SSYNC;
+	SSYNC(R3);
 	RTS;
 ENDPROC(_blackfin_dcache_invalidate_range)
 
@@ -235,7 +235,7 @@ ENTRY(_blackfin_dcache_flush_range)
 	R2 = R0 & R2;
 	P0 = R2;
 	P1 = R1;
-	CSYNC;
+	CSYNC(R3);
 	FLUSH[P0];
 1:
 	FLUSH[P0++];
@@ -247,17 +247,17 @@ ENTRY(_blackfin_dcache_flush_range)
 	 * one more.
 	 */
 	FLUSH[P0];
-	SSYNC;
+	SSYNC(R3);
 	RTS;
 ENDPROC(_blackfin_dcache_flush_range)
 
 ENTRY(_blackfin_dflush_page)
 	P1 = 1 << (PAGE_SHIFT - L1_CACHE_SHIFT);
 	P0 = R0;
-	CSYNC;
+	CSYNC(R3);
 	FLUSH[P0];
 	LSETUP (.Lfl1, .Lfl1) LC0 = P1;
 .Lfl1:	FLUSH [P0++];
-	SSYNC;
+	SSYNC(R3);
 	RTS;
 ENDPROC(_blackfin_dflush_page)

trunk/arch/blackfin/mach-common/interrupt.S

@@ -139,7 +139,7 @@ __common_int_entry:
 	fp = 0;
 #endif
 
-#ifdef	ANOMALY_05000283
+#if defined (ANOMALY_05000283) || defined (ANOMALY_05000315)
 	cc = r7 == r7;
 	p5.h = 0xffc0;
 	p5.l = 0x0014;

trunk/drivers/infiniband/core/umem.c

@@ -225,15 +225,13 @@ void ib_umem_release(struct ib_umem *umem)
 	 * up here and not be able to take the mmap_sem.  In that case
 	 * we defer the vm_locked accounting to the system workqueue.
 	 */
-	if (context->closing) {
-		if (!down_write_trylock(&mm->mmap_sem)) {
-			INIT_WORK(&umem->work, ib_umem_account);
-			umem->mm   = mm;
-			umem->diff = diff;
-
-			schedule_work(&umem->work);
-			return;
-		}
+	if (context->closing && !down_write_trylock(&mm->mmap_sem)) {
+		INIT_WORK(&umem->work, ib_umem_account);
+		umem->mm   = mm;
+		umem->diff = diff;
+
+		schedule_work(&umem->work);
+		return;
 	} else
 		down_write(&mm->mmap_sem);
 

trunk/drivers/infiniband/hw/mlx4/main.c

@@ -120,7 +120,7 @@ static int mlx4_ib_query_device(struct ib_device *ibdev,
 	props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
 	props->max_res_rd_atom	   = props->max_qp_rd_atom * props->max_qp;
 	props->max_srq		   = dev->dev->caps.num_srqs - dev->dev->caps.reserved_srqs;
-	props->max_srq_wr	   = dev->dev->caps.max_srq_wqes - 1;
+	props->max_srq_wr	   = dev->dev->caps.max_srq_wqes;
 	props->max_srq_sge	   = dev->dev->caps.max_srq_sge;
 	props->local_ca_ack_delay  = dev->dev->caps.local_ca_ack_delay;
 	props->atomic_cap	   = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?

trunk/drivers/infiniband/ulp/ipoib/ipoib_cm.c

@@ -56,6 +56,13 @@ MODULE_PARM_DESC(cm_data_debug_level,
 #define IPOIB_CM_RX_DELAY       (3 * 256 * HZ)
 #define IPOIB_CM_RX_UPDATE_MASK (0x3)
 
+struct ipoib_cm_id {
+	struct ib_cm_id *id;
+	int flags;
+	u32 remote_qpn;
+	u32 remote_mtu;
+};
+
 static struct ib_qp_attr ipoib_cm_err_attr = {
 	.qp_state = IB_QPS_ERR
 };
@@ -302,11 +309,6 @@ static int ipoib_cm_req_handler(struct ib_cm_id *cm_id, struct ib_cm_event *even
 		return -ENOMEM;
 	p->dev = dev;
 	p->id = cm_id;
-	cm_id->context = p;
-	p->state = IPOIB_CM_RX_LIVE;
-	p->jiffies = jiffies;
-	INIT_LIST_HEAD(&p->list);
-
 	p->qp = ipoib_cm_create_rx_qp(dev, p);
 	if (IS_ERR(p->qp)) {
 		ret = PTR_ERR(p->qp);
@@ -318,24 +320,24 @@ static int ipoib_cm_req_handler(struct ib_cm_id *cm_id, struct ib_cm_event *even
 	if (ret)
 		goto err_modify;
 
-	spin_lock_irq(&priv->lock);
-	queue_delayed_work(ipoib_workqueue,
-			   &priv->cm.stale_task, IPOIB_CM_RX_DELAY);
-	/* Add this entry to passive ids list head, but do not re-add it
-	 * if IB_EVENT_QP_LAST_WQE_REACHED has moved it to flush list. */
-	p->jiffies = jiffies;
-	if (p->state == IPOIB_CM_RX_LIVE)
-		list_move(&p->list, &priv->cm.passive_ids);
-	spin_unlock_irq(&priv->lock);
-
 	ret = ipoib_cm_send_rep(dev, cm_id, p->qp, &event->param.req_rcvd, psn);
 	if (ret) {
 		ipoib_warn(priv, "failed to send REP: %d\n", ret);
-		if (ib_modify_qp(p->qp, &ipoib_cm_err_attr, IB_QP_STATE))
-			ipoib_warn(priv, "unable to move qp to error state\n");
+		goto err_rep;
 	}
+
+	cm_id->context = p;
+	p->jiffies = jiffies;
+	p->state = IPOIB_CM_RX_LIVE;
+	spin_lock_irq(&priv->lock);
+	if (list_empty(&priv->cm.passive_ids))
+		queue_delayed_work(ipoib_workqueue,
+				   &priv->cm.stale_task, IPOIB_CM_RX_DELAY);
+	list_add(&p->list, &priv->cm.passive_ids);
+	spin_unlock_irq(&priv->lock);
 	return 0;
 
+err_rep:
 err_modify:
 	ib_destroy_qp(p->qp);
 err_qp:
@@ -752,9 +754,9 @@ static int ipoib_cm_rep_handler(struct ib_cm_id *cm_id, struct ib_cm_event *even
 
 	p->mtu = be32_to_cpu(data->mtu);
 
-	if (p->mtu <= IPOIB_ENCAP_LEN) {
-		ipoib_warn(priv, "Rejecting connection: mtu %d <= %d\n",
-			   p->mtu, IPOIB_ENCAP_LEN);
+	if (p->mtu < priv->dev->mtu + IPOIB_ENCAP_LEN) {
+		ipoib_warn(priv, "Rejecting connection: mtu %d < device mtu %d + 4\n",
+			   p->mtu, priv->dev->mtu);
 		return -EINVAL;
 	}
 

trunk/include/asm-blackfin/blackfin.h

@@ -39,7 +39,9 @@ static inline void SSYNC (void)
 #elif !defined(ANOMALY_05000312) && defined(ANOMALY_05000244)
 static inline void SSYNC (void)
 {
-	__builtin_bfin_ssync();
+	__asm__ __volatile__ ("nop; nop; nop;\n\t"
+			"ssync;\n\t"
+			::);
 }
 #elif !defined(ANOMALY_05000312) && !defined(ANOMALY_05000244)
 static inline void SSYNC (void)
@@ -71,7 +73,9 @@ static inline void CSYNC (void)
 #elif !defined(ANOMALY_05000312) && defined(ANOMALY_05000244)
 static inline void CSYNC (void)
 {
-	__builtin_bfin_csync();
+	__asm__ __volatile__ ("nop; nop; nop;\n\t"
+			"ssync;\n\t"
+			::);
 }
 #elif !defined(ANOMALY_05000312) && !defined(ANOMALY_05000244)
 static inline void CSYNC (void)
@@ -80,6 +84,31 @@ static inline void CSYNC (void)
 }
 #endif
 
+#else  /* __ASSEMBLY__ */
+
+/* SSYNC & CSYNC implementations for assembly files */
+
+#define ssync(x) SSYNC(x)
+#define csync(x) CSYNC(x)
+
+#if defined(ANOMALY_05000312) && defined(ANOMALY_05000244)
+#define SSYNC(scratch) cli scratch; nop; nop; SSYNC; sti scratch;
+#define CSYNC(scratch) cli scratch; nop; nop; CSYNC; sti scratch;
+
+#elif defined(ANOMALY_05000312) && !defined(ANOMALY_05000244)
+#define SSYNC(scratch) cli scratch; nop; nop; SSYNC; sti scratch;
+#define CSYNC(scratch) cli scratch; nop; nop; CSYNC; sti scratch;
+
+#elif !defined(ANOMALY_05000312) && defined(ANOMALY_05000244)
+#define SSYNC(scratch) nop; nop; nop; SSYNC;
+#define CSYNC(scratch) nop; nop; nop; CSYNC;
+
+#elif !defined(ANOMALY_05000312) && !defined(ANOMALY_05000244)
+#define SSYNC(scratch) SSYNC;
+#define CSYNC(scratch) CSYNC;
+
+#endif /* ANOMALY_05000312 & ANOMALY_05000244 handling */
+
 #endif /* __ASSEMBLY__ */
 
 #endif				/* _BLACKFIN_H_ */