---

yaml
---
r: 138419
b: refs/heads/master
c: 34bcda6
h: refs/heads/master
i:
  138417: 95ddec6
  138415: efd7493
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 960d82aa5ba971aa9da86a41881cb8dc8f96e397
+refs/heads/master: 34bcda616e5308a0633d5bfabcc090d7aa09b494

trunk/Documentation/powerpc/dts-bindings/fsl/esdhc.txt

@@ -0,0 +1,24 @@
+* Freescale Enhanced Secure Digital Host Controller (eSDHC)
+
+The Enhanced Secure Digital Host Controller provides an interface
+for MMC, SD, and SDIO types of memory cards.
+
+Required properties:
+  - compatible : should be
+    "fsl,<chip>-esdhc", "fsl,mpc8379-esdhc" for MPC83xx processors.
+    "fsl,<chip>-esdhc", "fsl,mpc8536-esdhc" for MPC85xx processors.
+  - reg : should contain eSDHC registers location and length.
+  - interrupts : should contain eSDHC interrupt.
+  - interrupt-parent : interrupt source phandle.
+  - clock-frequency : specifies eSDHC base clock frequency.
+
+Example:
+
+sdhci@2e000 {
+	compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+	reg = <0x2e000 0x1000>;
+	interrupts = <42 0x8>;
+	interrupt-parent = <&ipic>;
+	/* Filled in by U-Boot */
+	clock-frequency = <0>;
+};