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yaml
---
r: 314158
b: refs/heads/master
c: 73395a7
h: refs/heads/master
v: v3
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Ido Reis authored and Luciano Coelho committed Jun 7, 2012
1 parent ba67237 commit 09d7007
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Showing 3 changed files with 13 additions and 2 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 4085f641e704b1ff1a60f62756f49281a181f707
refs/heads/master: 73395a79df00c3e0101bd7a0229dbbcc065b606a
12 changes: 11 additions & 1 deletion trunk/drivers/net/wireless/ti/wl18xx/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -588,6 +588,17 @@ static int wl18xx_identify_chip(struct wl1271 *wl)
int ret = 0;

switch (wl->chip.id) {
case CHIP_ID_185x_PG20:
wl1271_debug(DEBUG_BOOT, "chip id 0x%x (185x PG20)",
wl->chip.id);
wl->sr_fw_name = WL18XX_FW_NAME;
/* wl18xx uses the same firmware for PLT */
wl->plt_fw_name = WL18XX_FW_NAME;
wl->quirks |= WLCORE_QUIRK_NO_ELP |
WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED |
WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN;

break;
case CHIP_ID_185x_PG10:
wl1271_debug(DEBUG_BOOT, "chip id 0x%x (185x PG10)",
wl->chip.id);
Expand All @@ -602,7 +613,6 @@ static int wl18xx_identify_chip(struct wl1271 *wl)
/* PG 1.0 has some problems with MCS_13, so disable it */
wl->ht_cap[IEEE80211_BAND_2GHZ].mcs.rx_mask[1] &= ~BIT(5);

/* TODO: need to blocksize alignment for RX/TX separately? */
break;
default:
wl1271_warning("unsupported chip id: 0x%x", wl->chip.id);
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1 change: 1 addition & 0 deletions trunk/drivers/net/wireless/ti/wl18xx/reg.h
Original file line number Diff line number Diff line change
Expand Up @@ -140,6 +140,7 @@
#define WL18XX_FW_STATUS_ADDR 0x50F8

#define CHIP_ID_185x_PG10 (0x06030101)
#define CHIP_ID_185x_PG20 (0x06030111)

/*
* Host Command Interrupt. Setting this bit masks
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