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ARM: dts: sun7i: external clock outputs
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This commit adds the two external clock outputs available on A20 to
its device tree. A dummy fixed factor clock is also added to serve as
the first input of the clock outputs, which according to AW's A20 user
manual, is the 24MHz oscillator divided by 750.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored and Maxime Ripard committed Jan 2, 2014
1 parent 673fac7 commit 0aff037
Showing 1 changed file with 28 additions and 0 deletions.
28 changes: 28 additions & 0 deletions arch/arm/boot/dts/sun7i-a20.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -303,6 +303,34 @@
clocks = <&osc24M>, <&pll6 2>, <&pll5 1>;
clock-output-names = "mbus";
};

/*
* Dummy clock used by output clocks
*/
osc24M_32k: clk@1 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-div = <750>;
clock-mult = <1>;
clocks = <&osc24M>;
clock-output-names = "osc24M_32k";
};

clk_out_a: clk@01c201f0 {
#clock-cells = <0>;
compatible = "allwinner,sun7i-a20-out-clk";
reg = <0x01c201f0 0x4>;
clocks = <&osc24M_32k>, <&osc32k>, <&osc24M>;
clock-output-names = "clk_out_a";
};

clk_out_b: clk@01c201f4 {
#clock-cells = <0>;
compatible = "allwinner,sun7i-a20-out-clk";
reg = <0x01c201f4 0x4>;
clocks = <&osc24M_32k>, <&osc32k>, <&osc24M>;
clock-output-names = "clk_out_b";
};
};

soc@01c00000 {
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