[MIPS] FPU hazard handling

Move FPU hazard handling to hazards.h and provide proper support for
MIPSR2 processors

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

include/asm-mips/fpu.h

@@ -16,6 +16,7 @@
 #include <asm/mipsregs.h>
 #include <asm/cpu.h>
 #include <asm/cpu-features.h>
+#include <asm/hazards.h>
 #include <asm/bitops.h>
 #include <asm/processor.h>
 #include <asm/current.h>
@@ -38,34 +39,16 @@ extern void _init_fpu(void);
 extern void _save_fp(struct task_struct *);
 extern void _restore_fp(struct task_struct *);
 
-#if defined(CONFIG_CPU_SB1)
-#define __enable_fpu_hazard()						\
-do {									\
-	asm(".set	push		\n\t"				\
-	    ".set	mips64		\n\t"				\
-	    ".set	noreorder	\n\t"				\
-	    "ssnop			\n\t"				\
-	    "bnezl	$0, .+4		\n\t"				\
-	    "ssnop			\n\t"				\
-	    ".set pop");						\
-} while (0)
-#else
-#define __enable_fpu_hazard()						\
-do {									\
-	asm("nop;nop;nop;nop");		/* max. hazard */		\
-} while (0)
-#endif
-
 #define __enable_fpu()							\
 do {									\
         set_c0_status(ST0_CU1);						\
-        __enable_fpu_hazard();						\
+        enable_fpu_hazard();						\
 } while (0)
 
 #define __disable_fpu()							\
 do {									\
 	clear_c0_status(ST0_CU1);					\
-	/* We don't care about the c0 hazard here  */			\
+        disable_fpu_hazard();						\
 } while (0)
 
 #define enable_fpu()							\

include/asm-mips/hazards.h

@@ -178,4 +178,36 @@ ASMMACRO(back_to_back_c0_hazard,
 
 #endif
 
+
+/* FPU hazards */
+
+#if defined(CONFIG_CPU_SB1)
+ASMMACRO(enable_fpu_hazard,
+	 .set	push;
+	 .set	mips64;
+	 .set	noreorder;
+	 _ssnop;
+	 bnezl	$0,.+4;
+	 _ssnop
+	 .set	pop
+)
+ASMMACRO(disable_fpu_hazard,
+)
+
+#elif defined(CONFIG_CPU_MIPSR2)
+ASMMACRO(enable_fpu_hazard,
+	 _ehb
+)
+ASMMACRO(disable_fpu_hazard,
+	 _ehb
+)
+#else
+ASMMACRO(enable_fpu_hazard,
+	 nop; nop; nop; nop
+)
+ASMMACRO(disable_fpu_hazard,
+	 _ehb
+)
+#endif
+
 #endif /* _ASM_HAZARDS_H */