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Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/…
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…arm-soc

Pull ARM SoC device-tree updates, take 2, from Olof Johansson:
 "This branch contains device-tree updates for the SPEAr platform.  They
  had dependencies on earlier branches from this merge window, which is
  why they were broken out in a separate branch."

* tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: SPEAr3xx: Shirq: Move shirq controller out of plat/
  ARM: SPEAr320: DT: Add SPEAr 320 HMI board support
  ARM: SPEAr3xx: DT: add shirq node for interrupt multiplexor
  ARM: SPEAr3xx: shirq: simplify and move the shared irq multiplexor to DT
  ARM: SPEAr1310: Fix AUXDATA for compact flash controller
  ARM: SPEAr13xx: Remove fields not required for ssp controller
  ARM: SPEAr1310: Move 1310 specific misc register into machine specific files
  ARM: SPEAr: DT: Update device nodes
  ARM: SPEAr: DT: add uart state to fix warning
  ARM: SPEAr: DT: Modify DT bindings for STMMAC
  ARM: SPEAr: DT: Fix existing DT support
  ARM: SPEAr: DT: Update partition info for MTD devices
  ARM: SPEAr: DT: Update pinctrl list
  ARM: SPEAr13xx: DT: Add spics gpio controller nodes
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Linus Torvalds committed Dec 14, 2012
2 parents 6a57d10 + eabc5fa commit 0beb587
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Showing 31 changed files with 1,428 additions and 777 deletions.
48 changes: 48 additions & 0 deletions Documentation/devicetree/bindings/arm/spear/shirq.txt
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@@ -0,0 +1,48 @@
* SPEAr Shared IRQ layer (shirq)

SPEAr3xx architecture includes shared/multiplexed irqs for certain set
of devices. The multiplexor provides a single interrupt to parent
interrupt controller (VIC) on behalf of a group of devices.

There can be multiple groups available on SPEAr3xx variants but not
exceeding 4. The number of devices in a group can differ, further they
may share same set of status/mask registers spanning across different
bit masks. Also in some cases the group may not have enable or other
registers. This makes software little complex.

A single node in the device tree is used to describe the shared
interrupt multiplexor (one node for all groups). A group in the
interrupt controller shares config/control registers with other groups.
For example, a 32-bit interrupt enable/disable config register can
accommodate upto 4 interrupt groups.

Required properties:
- compatible: should be, either of
- "st,spear300-shirq"
- "st,spear310-shirq"
- "st,spear320-shirq"
- interrupt-controller: Identifies the node as an interrupt controller.
- #interrupt-cells: should be <1> which basically contains the offset
(starting from 0) of interrupts for all the groups.
- reg: Base address and size of shirq registers.
- interrupts: The list of interrupts generated by the groups which are
then connected to a parent interrupt controller. Each group is
associated with one of the interrupts, hence number of interrupts (to
parent) is equal to number of groups. The format of the interrupt
specifier depends in the interrupt parent controller.

Optional properties:
- interrupt-parent: pHandle of the parent interrupt controller, if not
inherited from the parent node.

Example:

The following is an example from the SPEAr320 SoC dtsi file.

shirq: interrupt-controller@0xb3000000 {
compatible = "st,spear320-shirq";
reg = <0xb3000000 0x1000>;
interrupts = <28 29 30 1>;
#interrupt-cells = <1>;
interrupt-controller;
};
3 changes: 2 additions & 1 deletion arch/arm/boot/dts/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -126,7 +126,8 @@ dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
spear1340-evb.dtb
dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
spear310-evb.dtb \
spear320-evb.dtb
spear320-evb.dtb \
spear320-hmi.dtb
dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun4i-cubieboard.dtb \
sun5i-olinuxino.dtb
Expand Down
165 changes: 146 additions & 19 deletions arch/arm/boot/dts/spear1310-evb.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -30,10 +30,14 @@
pinctrl-0 = <&state_default>;

state_default: pinmux {
i2c0-pmx {
i2c0 {
st,pins = "i2c0_grp";
st,function = "i2c0";
};
i2s0 {
st,pins = "i2s0_grp";
st,function = "i2s0";
};
i2s1 {
st,pins = "i2s1_grp";
st,function = "i2s1";
Expand All @@ -42,6 +46,10 @@
st,pins = "arm_gpio_grp";
st,function = "arm_gpio";
};
clcd {
st,pins = "clcd_grp" , "clcd_high_res";
st,function = "clcd";
};
eth {
st,pins = "gmii_grp";
st,function = "gmii";
Expand Down Expand Up @@ -74,11 +82,6 @@
st,pins = "i2c_1_2_grp";
st,function = "i2c_1_2";
};
pci {
st,pins = "pcie0_grp","pcie1_grp",
"pcie2_grp";
st,function = "pci";
};
smii {
st,pins = "smii_0_1_2_grp";
st,function = "smii_0_1_2";
Expand All @@ -88,6 +91,14 @@
"nand_16bit_grp";
st,function = "nand";
};
sata {
st,pins = "sata0_grp";
st,function = "sata";
};
pcie {
st,pins = "pcie1_grp", "pcie2_grp";
st,function = "pci_express";
};
};
};

Expand All @@ -109,9 +120,49 @@

fsmc: flash@b0000000 {
status = "okay";

partition@0 {
label = "xloader";
reg = <0x0 0x80000>;
};
partition@80000 {
label = "u-boot";
reg = <0x80000 0x140000>;
};
partition@1C0000 {
label = "environment";
reg = <0x1C0000 0x40000>;
};
partition@200000 {
label = "dtb";
reg = <0x200000 0x40000>;
};
partition@240000 {
label = "linux";
reg = <0x240000 0xC00000>;
};
partition@E40000 {
label = "rootfs";
reg = <0xE40000 0x0>;
};
};

gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;

button@1 {
label = "wakeup";
linux,code = <0x100>;
gpios = <&gpio0 7 0x4>;
debounce-interval = <20>;
gpio-key,wakeup = <1>;
};
};

gmac0: eth@e2000000 {
phy-mode = "gmii";
status = "okay";
};

Expand All @@ -135,23 +186,27 @@
};
partition@10000 {
label = "u-boot";
reg = <0x10000 0x40000>;
reg = <0x10000 0x50000>;
};
partition@60000 {
label = "environment";
reg = <0x60000 0x10000>;
};
partition@50000 {
partition@70000 {
label = "dtb";
reg = <0x70000 0x10000>;
};
partition@80000 {
label = "linux";
reg = <0x50000 0x2c0000>;
reg = <0x80000 0x310000>;
};
partition@310000 {
partition@390000 {
label = "rootfs";
reg = <0x310000 0x4f0000>;
reg = <0x390000 0x0>;
};
};
};

spi0: spi@e0100000 {
status = "okay";
};

ehci@e4800000 {
status = "okay";
};
Expand Down Expand Up @@ -189,10 +244,6 @@
status = "okay";
};

i2c1: i2c@5cd00000 {
status = "okay";
};

kbd@e0300000 {
linux,keymap = < 0x00000001
0x00010002
Expand Down Expand Up @@ -277,6 +328,7 @@
0x08080052 >;
autorepeat;
st,mode = <0>;
suspended_rate = <2000000>;
status = "okay";
};

Expand All @@ -286,6 +338,81 @@

serial@e0000000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <>;
};

spi0: spi@e0100000 {
status = "okay";
num-cs = <3>;
cs-gpios = <&gpio1 7 0>, <&spics 0>, <&spics 1>;

stmpe610@0 {
compatible = "st,stmpe610";
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <1000000>;
spi-cpha;
pl022,hierarchy = <0>;
pl022,interface = <0>;
pl022,slave-tx-disable;
pl022,com-mode = <0>;
pl022,rx-level-trig = <0>;
pl022,tx-level-trig = <0>;
pl022,ctrl-len = <0x7>;
pl022,wait-state = <0>;
pl022,duplex = <0>;
interrupts = <6 0x4>;
interrupt-parent = <&gpio1>;
irq-trigger = <0x2>;

stmpe_touchscreen {
compatible = "st,stmpe-ts";
ts,sample-time = <4>;
ts,mod-12b = <1>;
ts,ref-sel = <0>;
ts,adc-freq = <1>;
ts,ave-ctrl = <1>;
ts,touch-det-delay = <2>;
ts,settling = <2>;
ts,fraction-z = <7>;
ts,i-drive = <1>;
};
};

m25p80@1 {
compatible = "st,m25p80";
reg = <1>;
spi-max-frequency = <12000000>;
spi-cpol;
spi-cpha;
pl022,hierarchy = <0>;
pl022,interface = <0>;
pl022,slave-tx-disable;
pl022,com-mode = <0x2>;
pl022,rx-level-trig = <0>;
pl022,tx-level-trig = <0>;
pl022,ctrl-len = <0x11>;
pl022,wait-state = <0>;
pl022,duplex = <0>;
};

spidev@2 {
compatible = "spidev";
reg = <2>;
spi-max-frequency = <25000000>;
spi-cpha;
pl022,hierarchy = <0>;
pl022,interface = <0>;
pl022,slave-tx-disable;
pl022,com-mode = <0x2>;
pl022,rx-level-trig = <0>;
pl022,tx-level-trig = <0>;
pl022,ctrl-len = <0x11>;
pl022,wait-state = <0>;
pl022,duplex = <0>;
};
};

wdt@ec800620 {
Expand Down
32 changes: 25 additions & 7 deletions arch/arm/boot/dts/spear1310.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,18 @@
compatible = "st,spear1310";

ahb {
spics: spics@e0700000{
compatible = "st,spear-spics-gpio";
reg = <0xe0700000 0x1000>;
st-spics,peripcfg-reg = <0x3b0>;
st-spics,sw-enable-bit = <12>;
st-spics,cs-value-bit = <11>;
st-spics,cs-enable-mask = <3>;
st-spics,cs-enable-shift = <8>;
gpio-controller;
#gpio-cells = <2>;
};

ahci@b1000000 {
compatible = "snps,spear-ahci";
reg = <0xb1000000 0x10000>;
Expand All @@ -43,6 +55,7 @@
reg = <0x5c400000 0x8000>;
interrupts = <0 95 0x4>;
interrupt-names = "macirq";
phy-mode = "mii";
status = "disabled";
};

Expand All @@ -51,6 +64,7 @@
reg = <0x5c500000 0x8000>;
interrupts = <0 96 0x4>;
interrupt-names = "macirq";
phy-mode = "mii";
status = "disabled";
};

Expand All @@ -59,6 +73,7 @@
reg = <0x5c600000 0x8000>;
interrupts = <0 97 0x4>;
interrupt-names = "macirq";
phy-mode = "rmii";
status = "disabled";
};

Expand All @@ -67,6 +82,7 @@
reg = <0x5c700000 0x8000>;
interrupts = <0 98 0x4>;
interrupt-names = "macirq";
phy-mode = "rgmii";
status = "disabled";
};

Expand All @@ -76,13 +92,6 @@
#gpio-range-cells = <2>;
};

spi1: spi@5d400000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x5d400000 0x1000>;
interrupts = <0 99 0x4>;
status = "disabled";
};

apb {
i2c1: i2c@5cd00000 {
#address-cells = <1>;
Expand Down Expand Up @@ -147,6 +156,15 @@
status = "disabled";
};

spi1: spi@5d400000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x5d400000 0x1000>;
interrupts = <0 99 0x4>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};

serial@5c800000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x5c800000 0x1000>;
Expand Down
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