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xtensa: add support for the XTFPGA boards
The Avnet LX60/LX110/LX200 board is an FPGA board that can be configured with an Xtensa processor and an OpenCores Ethernet device. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
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Max Filippov
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Chris Zankel
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Dec 19, 2012
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# Makefile for the Tensilica xtavnet Emulation Board | ||
# | ||
# Note! Dependencies are done automagically by 'make dep', which also | ||
# removes any old dependencies. DON'T put your own dependencies here | ||
# unless it's something special (ie not a .c file). | ||
# | ||
# Note 2! The CFLAGS definitions are in the main makefile... | ||
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obj-y = setup.o lcd.o |
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/* | ||
* arch/xtensa/platform/xtavnet/include/platform/hardware.h | ||
* | ||
* This file is subject to the terms and conditions of the GNU General Public | ||
* License. See the file "COPYING" in the main directory of this archive | ||
* for more details. | ||
* | ||
* Copyright (C) 2006 Tensilica Inc. | ||
*/ | ||
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/* | ||
* This file contains the hardware configuration of the XTAVNET boards. | ||
*/ | ||
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#ifndef __XTENSA_XTAVNET_HARDWARE_H | ||
#define __XTENSA_XTAVNET_HARDWARE_H | ||
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/* By default NO_IRQ is defined to 0 in Linux, but we use the | ||
interrupt 0 for UART... */ | ||
#define NO_IRQ -1 | ||
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/* Memory configuration. */ | ||
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#define PLATFORM_DEFAULT_MEM_START 0x00000000 | ||
#define PLATFORM_DEFAULT_MEM_SIZE 0x04000000 | ||
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/* Interrupt configuration. */ | ||
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#define PLATFORM_NR_IRQS 10 | ||
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/* Default assignment of LX60 devices to external interrupts. */ | ||
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#ifdef CONFIG_ARCH_HAS_SMP | ||
#define DUART16552_INTNUM XCHAL_EXTINT3_NUM | ||
#define OETH_IRQ XCHAL_EXTINT4_NUM | ||
#else | ||
#define DUART16552_INTNUM XCHAL_EXTINT0_NUM | ||
#define OETH_IRQ XCHAL_EXTINT1_NUM | ||
#endif | ||
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/* | ||
* Device addresses and parameters. | ||
*/ | ||
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/* UART */ | ||
#define DUART16552_PADDR (XCHAL_KIO_PADDR + 0x0D050020) | ||
/* LCD instruction and data addresses. */ | ||
#define LCD_INSTR_ADDR ((char *)IOADDR(0x0D040000)) | ||
#define LCD_DATA_ADDR ((char *)IOADDR(0x0D040004)) | ||
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/* Misc. */ | ||
#define XTFPGA_FPGAREGS_VADDR IOADDR(0x0D020000) | ||
/* Clock frequency in Hz (read-only): */ | ||
#define XTFPGA_CLKFRQ_VADDR (XTFPGA_FPGAREGS_VADDR + 0x04) | ||
/* Setting of 8 DIP switches: */ | ||
#define DIP_SWITCHES_VADDR (XTFPGA_FPGAREGS_VADDR + 0x0C) | ||
/* Software reset (write 0xdead): */ | ||
#define XTFPGA_SWRST_VADDR (XTFPGA_FPGAREGS_VADDR + 0x10) | ||
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/* OpenCores Ethernet controller: */ | ||
/* regs + RX/TX descriptors */ | ||
#define OETH_REGS_PADDR (XCHAL_KIO_PADDR + 0x0D030000) | ||
#define OETH_REGS_SIZE 0x1000 | ||
#define OETH_SRAMBUFF_PADDR (XCHAL_KIO_PADDR + 0x0D800000) | ||
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/* 5*rx buffs + 5*tx buffs */ | ||
#define OETH_SRAMBUFF_SIZE (5 * 0x600 + 5 * 0x600) | ||
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#endif /* __XTENSA_XTAVNET_HARDWARE_H */ |
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/* | ||
* arch/xtensa/platform/xtavnet/include/platform/lcd.h | ||
* | ||
* This file is subject to the terms and conditions of the GNU General Public | ||
* License. See the file "COPYING" in the main directory of this archive | ||
* for more details. | ||
* | ||
* Copyright (C) 2001, 2006 Tensilica Inc. | ||
*/ | ||
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#ifndef __XTENSA_XTAVNET_LCD_H | ||
#define __XTENSA_XTAVNET_LCD_H | ||
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/* Display string STR at position POS on the LCD. */ | ||
void lcd_disp_at_pos(char *str, unsigned char pos); | ||
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/* Shift the contents of the LCD display left or right. */ | ||
void lcd_shiftleft(void); | ||
void lcd_shiftright(void); | ||
#endif |
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/* | ||
* arch/xtensa/platform/xtavnet/include/platform/serial.h | ||
* | ||
* This file is subject to the terms and conditions of the GNU General Public | ||
* License. See the file "COPYING" in the main directory of this archive | ||
* for more details. | ||
* | ||
* Copyright (C) 2001, 2006 Tensilica Inc. | ||
*/ | ||
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#ifndef __ASM_XTENSA_XTAVNET_SERIAL_H | ||
#define __ASM_XTENSA_XTAVNET_SERIAL_H | ||
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#include <platform/hardware.h> | ||
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#define BASE_BAUD (*(long *)XTFPGA_CLKFRQ_VADDR / 16) | ||
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#endif /* __ASM_XTENSA_XTAVNET_SERIAL_H */ |
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/* | ||
* Driver for the LCD display on the Tensilica LX60 Board. | ||
* | ||
* This file is subject to the terms and conditions of the GNU General Public | ||
* License. See the file "COPYING" in the main directory of this archive | ||
* for more details. | ||
* | ||
* Copyright (C) 2001, 2006 Tensilica Inc. | ||
*/ | ||
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/* | ||
* | ||
* FIXME: this code is from the examples from the LX60 user guide. | ||
* | ||
* The lcd_pause function does busy waiting, which is probably not | ||
* great. Maybe the code could be changed to use kernel timers, or | ||
* change the hardware to not need to wait. | ||
*/ | ||
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#include <linux/init.h> | ||
#include <linux/io.h> | ||
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#include <platform/hardware.h> | ||
#include <platform/lcd.h> | ||
#include <linux/delay.h> | ||
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#define LCD_PAUSE_ITERATIONS 4000 | ||
#define LCD_CLEAR 0x1 | ||
#define LCD_DISPLAY_ON 0xc | ||
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/* 8bit and 2 lines display */ | ||
#define LCD_DISPLAY_MODE8BIT 0x38 | ||
#define LCD_DISPLAY_POS 0x80 | ||
#define LCD_SHIFT_LEFT 0x18 | ||
#define LCD_SHIFT_RIGHT 0x1c | ||
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static int __init lcd_init(void) | ||
{ | ||
*LCD_INSTR_ADDR = LCD_DISPLAY_MODE8BIT; | ||
mdelay(5); | ||
*LCD_INSTR_ADDR = LCD_DISPLAY_MODE8BIT; | ||
udelay(200); | ||
*LCD_INSTR_ADDR = LCD_DISPLAY_MODE8BIT; | ||
udelay(50); | ||
*LCD_INSTR_ADDR = LCD_DISPLAY_ON; | ||
udelay(50); | ||
*LCD_INSTR_ADDR = LCD_CLEAR; | ||
mdelay(10); | ||
lcd_disp_at_pos("XTENSA LINUX", 0); | ||
return 0; | ||
} | ||
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void lcd_disp_at_pos(char *str, unsigned char pos) | ||
{ | ||
*LCD_INSTR_ADDR = LCD_DISPLAY_POS | pos; | ||
udelay(100); | ||
while (*str != 0) { | ||
*LCD_DATA_ADDR = *str; | ||
udelay(200); | ||
str++; | ||
} | ||
} | ||
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void lcd_shiftleft(void) | ||
{ | ||
*LCD_INSTR_ADDR = LCD_SHIFT_LEFT; | ||
udelay(50); | ||
} | ||
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void lcd_shiftright(void) | ||
{ | ||
*LCD_INSTR_ADDR = LCD_SHIFT_RIGHT; | ||
udelay(50); | ||
} | ||
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arch_initcall(lcd_init); |
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