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yaml
---
r: 171559
b: refs/heads/master
c: 507399f
h: refs/heads/master
i:
  171557: a4c2d8a
  171555: 4d09416
  171551: 99baf54
v: v3
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Matt Carlson authored and David S. Miller committed Nov 16, 2009
1 parent 02cf4d7 commit 0d73fd5
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Showing 2 changed files with 35 additions and 31 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: f66a29b03a2637ff052f2b8a81a5417fa44e228b
refs/heads/master: 507399f18ea5810de42f0ea228c14305a8f67512
64 changes: 34 additions & 30 deletions trunk/drivers/net/tg3.c
Original file line number Diff line number Diff line change
Expand Up @@ -12669,6 +12669,27 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
tp->dev->features |= NETIF_F_IPV6_CSUM;
}

/* Determine TSO capabilities */
if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
tp->tg3_flags2 |= TG3_FLG2_HW_TSO_2;
else if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
tp->tg3_flags2 |= TG3_FLG2_HW_TSO_1 | TG3_FLG2_TSO_BUG;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 &&
tp->pci_chip_rev_id >= CHIPREV_ID_5750_C2)
tp->tg3_flags2 &= ~TG3_FLG2_TSO_BUG;
} else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701 &&
tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) {
tp->tg3_flags2 |= TG3_FLG2_TSO_BUG;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705)
tp->fw_needed = FIRMWARE_TG3TSO5;
else
tp->fw_needed = FIRMWARE_TG3TSO;
}

tp->irq_max = 1;

if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
tp->tg3_flags |= TG3_FLAG_SUPPORT_MSI;
if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX ||
Expand All @@ -12680,22 +12701,13 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)

if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
tp->tg3_flags2 |= TG3_FLG2_HW_TSO_2;
tp->tg3_flags2 |= TG3_FLG2_1SHOT_MSI;
} else {
tp->tg3_flags2 |= TG3_FLG2_HW_TSO_1 | TG3_FLG2_TSO_BUG;
if (GET_ASIC_REV(tp->pci_chip_rev_id) ==
ASIC_REV_5750 &&
tp->pci_chip_rev_id >= CHIPREV_ID_5750_C2)
tp->tg3_flags2 &= ~TG3_FLG2_TSO_BUG;
}
}

tp->irq_max = 1;

if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) {
tp->tg3_flags |= TG3_FLAG_SUPPORT_MSIX;
tp->irq_max = TG3_IRQ_MAX_VECS;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) {
tp->tg3_flags |= TG3_FLAG_SUPPORT_MSIX;
tp->irq_max = TG3_IRQ_MAX_VECS;
}
}

if (!(tp->tg3_flags3 & TG3_FLG3_5755_PLUS)) {
Expand Down Expand Up @@ -14108,25 +14120,17 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,

tg3_init_bufmgr_config(tp);

if (tp->pci_chip_rev_id == CHIPREV_ID_5701_A0)
tp->fw_needed = FIRMWARE_TG3;

if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) {
/* Selectively allow TSO based on operating conditions */
if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO) ||
(tp->fw_needed && !(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)))
tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE;
else {
tp->tg3_flags2 &= ~(TG3_FLG2_TSO_CAPABLE | TG3_FLG2_TSO_BUG);
tp->fw_needed = NULL;
}
else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 ||
tp->pci_chip_rev_id == CHIPREV_ID_5705_A0 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906 ||
(tp->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0) {
tp->tg3_flags2 &= ~TG3_FLG2_TSO_CAPABLE;
} else {
tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE | TG3_FLG2_TSO_BUG;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705)
tp->fw_needed = FIRMWARE_TG3TSO5;
else
tp->fw_needed = FIRMWARE_TG3TSO;
}

if (tp->pci_chip_rev_id == CHIPREV_ID_5701_A0)
tp->fw_needed = FIRMWARE_TG3;

/* TSO is on by default on chips that support hardware TSO.
* Firmware TSO on older chips gives lower performance, so it
Expand Down

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