---

yaml --- r: 212460 b: refs/heads/master c: a4ae413 h: refs/heads/master v: v3
git-mirror · Oct 8, 2010 · 0da0a03 · 0da0a03
1 parent 50033c0
commit 0da0a03
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Showing 3 changed files with 4 additions and 4 deletions.
diff --git a/[refs] b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 5085f3ff458521045f7e43da62b8c30ea7df2e82
+refs/heads/master: a4ae41341fd39af6e25ec9861a6a4dc0c5c58b16
diff --git a/trunk/arch/arm/kernel/head-common.S b/trunk/arch/arm/kernel/head-common.S
@@ -18,7 +18,6 @@
 	.align	2
 	.type	__switch_data, %object
 __switch_data:
-	.long	__mmap_switched
 	.long	__data_loc			@ r4
 	.long	_data				@ r5
 	.long	__bss_start			@ r6
@@ -39,7 +38,7 @@ __switch_data:
  *  r9  = processor ID
  */
 __mmap_switched:
-	adr	r3, __switch_data + 4
+	adr	r3, __switch_data
 
 	ldmia	r3!, {r4, r5, r6, r7}
 	cmp	r4, r5				@ Copy data segment if needed

diff --git a/trunk/arch/arm/kernel/head.S b/trunk/arch/arm/kernel/head.S
@@ -95,13 +95,14 @@ ENTRY(stext)
 	 * above.  On return, the CPU will be ready for the MMU to be
 	 * turned on, and r0 will hold the CPU control register value.
 	 */
-	ldr	r13, __switch_data		@ address to jump to after
+	ldr	r13, =__mmap_switched		@ address to jump to after
 						@ mmu has been enabled
 	adr	lr, BSYM(__enable_mmu)		@ return (PIC) address
  ARM(	add	pc, r10, #PROCINFO_INITFUNC	)
  THUMB(	add	r12, r10, #PROCINFO_INITFUNC	)
  THUMB(	mov	pc, r12				)
 ENDPROC(stext)
+	.ltorg
 
 #if defined(CONFIG_SMP)
 ENTRY(secondary_startup)