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yaml
---
r: 199614
b: refs/heads/master
c: ca76482
h: refs/heads/master
v: v3
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Zhenyu Wang authored and Eric Anholt committed May 28, 2010
1 parent 9f4779a commit 0df7953
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Showing 2 changed files with 15 additions and 3 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: ab34c226812588de8f341ce48eb32c3fef5155a9
refs/heads/master: ca76482e0f4b64942c704fa11c620ffd1bdd8475
16 changes: 14 additions & 2 deletions trunk/drivers/gpu/drm/i915/intel_ringbuffer.c
Original file line number Diff line number Diff line change
Expand Up @@ -213,7 +213,7 @@ static int init_render_ring(struct drm_device *dev,
#define PIPE_CONTROL_FLUSH(addr) \
do { \
OUT_RING(GFX_OP_PIPE_CONTROL | PIPE_CONTROL_QW_WRITE | \
PIPE_CONTROL_DEPTH_STALL); \
PIPE_CONTROL_DEPTH_STALL | 2); \
OUT_RING(addr | PIPE_CONTROL_GLOBAL_GTT); \
OUT_RING(0); \
OUT_RING(0); \
Expand All @@ -236,7 +236,19 @@ render_ring_add_request(struct drm_device *dev,
u32 seqno;
drm_i915_private_t *dev_priv = dev->dev_private;
seqno = intel_ring_get_seqno(dev, ring);
if (HAS_PIPE_CONTROL(dev)) {

if (IS_GEN6(dev)) {
BEGIN_LP_RING(6);
OUT_RING(GFX_OP_PIPE_CONTROL | 3);
OUT_RING(PIPE_CONTROL_QW_WRITE |
PIPE_CONTROL_WC_FLUSH | PIPE_CONTROL_IS_FLUSH |
PIPE_CONTROL_NOTIFY);
OUT_RING(dev_priv->seqno_gfx_addr | PIPE_CONTROL_GLOBAL_GTT);
OUT_RING(seqno);
OUT_RING(0);
OUT_RING(0);
ADVANCE_LP_RING();
} else if (HAS_PIPE_CONTROL(dev)) {
u32 scratch_addr = dev_priv->seqno_gfx_addr + 128;

/*
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