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Merge branch 'devel-omap5' of git://git.kernel.org/pub/scm/linux/kern…
…el/git/tmlind/linux-omap into next/newsoc From Tony Lindgren <tony@atomide.com>: This branch contains minimal support for omap5 to boot to a console without clock framework support. This branch depends on omap-cleanup-part2-for-v3.6. * 'devel-omap5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: Kconfig update to support additional GPIOs in OMAP5 ARM: OMAP5: Add the build support arm/dts: OMAP5: Add omap5 dts files ARM: OMAP5: board-generic: Add device tree support ARM: omap2+: board-generic: clean up the irq data from board file ARM: OMAP5: Add SMP support ARM: OMAP5: Add the WakeupGen IP updates ARM: OMAP5: l3: Add l3 error handler support for omap5 ARM: OMAP5: gpmc: Update gpmc_init() ARM: OMAP5: timer: Add clocksource, clockevent support ARM: OMAP5: Add minimal support for OMAP5430 SOC ARM: OMAP5: id: Add cpu id for ES versions ARM: OMAP: counter-32k: Select the CR register offset using the IP scheme ARM: OMAP2+: Move stubbed secure_sram_reserve function to a common.c and call it __weak Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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/* | ||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
*/ | ||
/dts-v1/; | ||
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/include/ "omap5.dtsi" | ||
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/ { | ||
model = "TI OMAP5 EVM board"; | ||
compatible = "ti,omap5-evm", "ti,omap5"; | ||
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memory { | ||
device_type = "memory"; | ||
reg = <0x80000000 0x40000000>; /* 1 GB */ | ||
}; | ||
}; |
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/* | ||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
* Based on "omap4.dtsi" | ||
*/ | ||
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/* | ||
* Carveout for multimedia usecases | ||
* It should be the last 48MB of the first 512MB memory part | ||
* In theory, it should not even exist. That zone should be reserved | ||
* dynamically during the .reserve callback. | ||
*/ | ||
/memreserve/ 0x9d000000 0x03000000; | ||
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/include/ "skeleton.dtsi" | ||
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/ { | ||
compatible = "ti,omap5"; | ||
interrupt-parent = <&gic>; | ||
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aliases { | ||
serial0 = &uart1; | ||
serial1 = &uart2; | ||
serial2 = &uart3; | ||
serial3 = &uart4; | ||
serial4 = &uart5; | ||
serial5 = &uart6; | ||
}; | ||
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cpus { | ||
cpu@0 { | ||
compatible = "arm,cortex-a15"; | ||
}; | ||
cpu@1 { | ||
compatible = "arm,cortex-a15"; | ||
}; | ||
}; | ||
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/* | ||
* The soc node represents the soc top level view. It is uses for IPs | ||
* that are not memory mapped in the MPU view or for the MPU itself. | ||
*/ | ||
soc { | ||
compatible = "ti,omap-infra"; | ||
mpu { | ||
compatible = "ti,omap5-mpu"; | ||
ti,hwmods = "mpu"; | ||
}; | ||
}; | ||
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/* | ||
* XXX: Use a flat representation of the OMAP3 interconnect. | ||
* The real OMAP interconnect network is quite complex. | ||
* Since that will not bring real advantage to represent that in DT for | ||
* the moment, just use a fake OCP bus entry to represent the whole bus | ||
* hierarchy. | ||
*/ | ||
ocp { | ||
compatible = "ti,omap4-l3-noc", "simple-bus"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
ranges; | ||
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; | ||
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gic: interrupt-controller@48211000 { | ||
compatible = "arm,cortex-a15-gic"; | ||
interrupt-controller; | ||
#interrupt-cells = <3>; | ||
reg = <0x48211000 0x1000>, | ||
<0x48212000 0x1000>; | ||
}; | ||
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gpio1: gpio@4ae10000 { | ||
compatible = "ti,omap4-gpio"; | ||
ti,hwmods = "gpio1"; | ||
gpio-controller; | ||
#gpio-cells = <2>; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
}; | ||
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gpio2: gpio@48055000 { | ||
compatible = "ti,omap4-gpio"; | ||
ti,hwmods = "gpio2"; | ||
gpio-controller; | ||
#gpio-cells = <2>; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
}; | ||
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gpio3: gpio@48057000 { | ||
compatible = "ti,omap4-gpio"; | ||
ti,hwmods = "gpio3"; | ||
gpio-controller; | ||
#gpio-cells = <2>; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
}; | ||
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gpio4: gpio@48059000 { | ||
compatible = "ti,omap4-gpio"; | ||
ti,hwmods = "gpio4"; | ||
gpio-controller; | ||
#gpio-cells = <2>; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
}; | ||
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gpio5: gpio@4805b000 { | ||
compatible = "ti,omap4-gpio"; | ||
ti,hwmods = "gpio5"; | ||
gpio-controller; | ||
#gpio-cells = <2>; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
}; | ||
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gpio6: gpio@4805d000 { | ||
compatible = "ti,omap4-gpio"; | ||
ti,hwmods = "gpio6"; | ||
gpio-controller; | ||
#gpio-cells = <2>; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
}; | ||
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gpio7: gpio@48051000 { | ||
compatible = "ti,omap4-gpio"; | ||
ti,hwmods = "gpio7"; | ||
gpio-controller; | ||
#gpio-cells = <2>; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
}; | ||
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gpio8: gpio@48053000 { | ||
compatible = "ti,omap4-gpio"; | ||
ti,hwmods = "gpio8"; | ||
gpio-controller; | ||
#gpio-cells = <2>; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
}; | ||
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uart1: serial@4806a000 { | ||
compatible = "ti,omap4-uart"; | ||
ti,hwmods = "uart1"; | ||
clock-frequency = <48000000>; | ||
}; | ||
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uart2: serial@4806c000 { | ||
compatible = "ti,omap4-uart"; | ||
ti,hwmods = "uart2"; | ||
clock-frequency = <48000000>; | ||
}; | ||
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uart3: serial@48020000 { | ||
compatible = "ti,omap4-uart"; | ||
ti,hwmods = "uart3"; | ||
clock-frequency = <48000000>; | ||
}; | ||
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uart4: serial@4806e000 { | ||
compatible = "ti,omap4-uart"; | ||
ti,hwmods = "uart4"; | ||
clock-frequency = <48000000>; | ||
}; | ||
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uart5: serial@48066000 { | ||
compatible = "ti,omap5-uart"; | ||
ti,hwmods = "uart5"; | ||
clock-frequency = <48000000>; | ||
}; | ||
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uart6: serial@48068000 { | ||
compatible = "ti,omap6-uart"; | ||
ti,hwmods = "uart6"; | ||
clock-frequency = <48000000>; | ||
}; | ||
}; | ||
}; |
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@@ -236,3 +236,4 @@ CONFIG_CRC_T10DIF=y | |
CONFIG_CRC_ITU_T=y | ||
CONFIG_CRC7=y | ||
CONFIG_LIBCRC32C=y | ||
CONFIG_SOC_OMAP5=y |
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