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yaml
---
r: 43013
b: refs/heads/master
c: bb0d977
h: refs/heads/master
i:
  43011: 033fe60
v: v3
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Stephane Eranian authored and Andi Kleen committed Dec 7, 2006
1 parent 20d35bd commit 0e930e4
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Showing 2 changed files with 14 additions and 1 deletion.
2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: 86efef50cfff9905c4e4ec64f3d3d3b299226674
refs/heads/master: bb0d977ed42c79ed709c79dbab4ff2159941eb2a
13 changes: 13 additions & 0 deletions trunk/include/asm-i386/msr.h
Original file line number Diff line number Diff line change
Expand Up @@ -141,6 +141,10 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val)
#define MSR_IA32_MC0_ADDR 0x402
#define MSR_IA32_MC0_MISC 0x403

#define MSR_IA32_PEBS_ENABLE 0x3f1
#define MSR_IA32_DS_AREA 0x600
#define MSR_IA32_PERF_CAPABILITIES 0x345

/* Pentium IV performance counter MSRs */
#define MSR_P4_BPU_PERFCTR0 0x300
#define MSR_P4_BPU_PERFCTR1 0x301
Expand Down Expand Up @@ -284,4 +288,13 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val)
#define MSR_TMTA_LRTI_READOUT 0x80868018
#define MSR_TMTA_LRTI_VOLT_MHZ 0x8086801a

/* Intel Core-based CPU performance counters */
#define MSR_CORE_PERF_FIXED_CTR0 0x309
#define MSR_CORE_PERF_FIXED_CTR1 0x30a
#define MSR_CORE_PERF_FIXED_CTR2 0x30b
#define MSR_CORE_PERF_FIXED_CTR_CTRL 0x38d
#define MSR_CORE_PERF_GLOBAL_STATUS 0x38e
#define MSR_CORE_PERF_GLOBAL_CTRL 0x38f
#define MSR_CORE_PERF_GLOBAL_OVF_CTRL 0x390

#endif /* __ASM_MSR_H */

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