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yaml
---
r: 325453
b: refs/heads/master
c: b2abd98
h: refs/heads/master
i:
  325451: f17377e
v: v3
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H Hartley Sweeten authored and Greg Kroah-Hartman committed Sep 21, 2012
1 parent 45558c5 commit 0efaf8e
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Showing 2 changed files with 37 additions and 38 deletions.
2 changes: 1 addition & 1 deletion [refs]
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Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: effef787a9e7c95b58a70951ec934a4474fa73bf
refs/heads/master: b2abd982c484ba0e46ea681b0bc6d7baf7c47730
73 changes: 36 additions & 37 deletions trunk/drivers/staging/comedi/drivers/s526.c
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Original file line number Diff line number Diff line change
Expand Up @@ -256,14 +256,13 @@ static int s526_gpct_insn_config(struct comedi_device *dev,
subdev_channel); */

for (i = 0; i < MAX_GPCT_CONFIG_DATA; i++) {
devpriv->s526_gpct_config[subdev_channel].data[i] =
insn->data[i];
/* printk("data[%d]=%x\n", i, insn->data[i]); */
devpriv->s526_gpct_config[subdev_channel].data[i] = data[i];
/* printk("data[%d]=%x\n", i, data[i]); */
}

/* Check what type of Counter the user requested, data[0] contains */
/* the Application type */
switch (insn->data[0]) {
switch (data[0]) {
case INSN_CONFIG_GPCT_QUADRATURE_ENCODER:
/*
data[0]: Application Type
Expand Down Expand Up @@ -307,7 +306,7 @@ static int s526_gpct_insn_config(struct comedi_device *dev,

#if 1
/* Set Counter Mode Register */
cmReg.value = insn->data[1] & 0xFFFF;
cmReg.value = data[1] & 0xFFFF;

/* printk("s526: Counter Mode register=%x\n", cmReg.value); */
outw(cmReg.value, ADDR_CHAN_REG(REG_C0M, subdev_channel));
Expand All @@ -325,39 +324,39 @@ static int s526_gpct_insn_config(struct comedi_device *dev,
cmReg.reg.countDirCtrl = 0;

/* data[1] contains GPCT_X1, GPCT_X2 or GPCT_X4 */
if (insn->data[1] == GPCT_X2)
if (data[1] == GPCT_X2)
cmReg.reg.clockSource = 1;
else if (insn->data[1] == GPCT_X4)
else if (data[1] == GPCT_X4)
cmReg.reg.clockSource = 2;
else
cmReg.reg.clockSource = 0;

/* When to take into account the indexpulse: */
/*if (insn->data[2] == GPCT_IndexPhaseLowLow) {
} else if (insn->data[2] == GPCT_IndexPhaseLowHigh) {
} else if (insn->data[2] == GPCT_IndexPhaseHighLow) {
} else if (insn->data[2] == GPCT_IndexPhaseHighHigh) {
/*if (data[2] == GPCT_IndexPhaseLowLow) {
} else if (data[2] == GPCT_IndexPhaseLowHigh) {
} else if (data[2] == GPCT_IndexPhaseHighLow) {
} else if (data[2] == GPCT_IndexPhaseHighHigh) {
}*/
/* Take into account the index pulse? */
if (insn->data[3] == GPCT_RESET_COUNTER_ON_INDEX)
if (data[3] == GPCT_RESET_COUNTER_ON_INDEX)
/* Auto load with INDEX^ */
cmReg.reg.autoLoadResetRcap = 4;

/* Set Counter Mode Register */
cmReg.value = (short)(insn->data[1] & 0xFFFF);
cmReg.value = (short)(data[1] & 0xFFFF);
outw(cmReg.value, ADDR_CHAN_REG(REG_C0M, subdev_channel));

/* Load the pre-load register high word */
value = (short)((insn->data[2] >> 16) & 0xFFFF);
value = (short)((data[2] >> 16) & 0xFFFF);
outw(value, ADDR_CHAN_REG(REG_C0H, subdev_channel));

/* Load the pre-load register low word */
value = (short)(insn->data[2] & 0xFFFF);
value = (short)(data[2] & 0xFFFF);
outw(value, ADDR_CHAN_REG(REG_C0L, subdev_channel));

/* Write the Counter Control Register */
if (insn->data[3] != 0) {
value = (short)(insn->data[3] & 0xFFFF);
if (data[3] != 0) {
value = (short)(data[3] & 0xFFFF);
outw(value, ADDR_CHAN_REG(REG_C0C, subdev_channel));
}
/* Reset the counter if it is software preload */
Expand All @@ -383,34 +382,34 @@ static int s526_gpct_insn_config(struct comedi_device *dev,
SinglePulseGeneration;

/* Set Counter Mode Register */
cmReg.value = (short)(insn->data[1] & 0xFFFF);
cmReg.value = (short)(data[1] & 0xFFFF);
cmReg.reg.preloadRegSel = 0; /* PR0 */
outw(cmReg.value, ADDR_CHAN_REG(REG_C0M, subdev_channel));

/* Load the pre-load register 0 high word */
value = (short)((insn->data[2] >> 16) & 0xFFFF);
value = (short)((data[2] >> 16) & 0xFFFF);
outw(value, ADDR_CHAN_REG(REG_C0H, subdev_channel));

/* Load the pre-load register 0 low word */
value = (short)(insn->data[2] & 0xFFFF);
value = (short)(data[2] & 0xFFFF);
outw(value, ADDR_CHAN_REG(REG_C0L, subdev_channel));

/* Set Counter Mode Register */
cmReg.value = (short)(insn->data[1] & 0xFFFF);
cmReg.value = (short)(data[1] & 0xFFFF);
cmReg.reg.preloadRegSel = 1; /* PR1 */
outw(cmReg.value, ADDR_CHAN_REG(REG_C0M, subdev_channel));

/* Load the pre-load register 1 high word */
value = (short)((insn->data[3] >> 16) & 0xFFFF);
value = (short)((data[3] >> 16) & 0xFFFF);
outw(value, ADDR_CHAN_REG(REG_C0H, subdev_channel));

/* Load the pre-load register 1 low word */
value = (short)(insn->data[3] & 0xFFFF);
value = (short)(data[3] & 0xFFFF);
outw(value, ADDR_CHAN_REG(REG_C0L, subdev_channel));

/* Write the Counter Control Register */
if (insn->data[4] != 0) {
value = (short)(insn->data[4] & 0xFFFF);
if (data[4] != 0) {
value = (short)(data[4] & 0xFFFF);
outw(value, ADDR_CHAN_REG(REG_C0C, subdev_channel));
}
break;
Expand All @@ -428,34 +427,34 @@ static int s526_gpct_insn_config(struct comedi_device *dev,
PulseTrainGeneration;

/* Set Counter Mode Register */
cmReg.value = (short)(insn->data[1] & 0xFFFF);
cmReg.value = (short)(data[1] & 0xFFFF);
cmReg.reg.preloadRegSel = 0; /* PR0 */
outw(cmReg.value, ADDR_CHAN_REG(REG_C0M, subdev_channel));

/* Load the pre-load register 0 high word */
value = (short)((insn->data[2] >> 16) & 0xFFFF);
value = (short)((data[2] >> 16) & 0xFFFF);
outw(value, ADDR_CHAN_REG(REG_C0H, subdev_channel));

/* Load the pre-load register 0 low word */
value = (short)(insn->data[2] & 0xFFFF);
value = (short)(data[2] & 0xFFFF);
outw(value, ADDR_CHAN_REG(REG_C0L, subdev_channel));

/* Set Counter Mode Register */
cmReg.value = (short)(insn->data[1] & 0xFFFF);
cmReg.value = (short)(data[1] & 0xFFFF);
cmReg.reg.preloadRegSel = 1; /* PR1 */
outw(cmReg.value, ADDR_CHAN_REG(REG_C0M, subdev_channel));

/* Load the pre-load register 1 high word */
value = (short)((insn->data[3] >> 16) & 0xFFFF);
value = (short)((data[3] >> 16) & 0xFFFF);
outw(value, ADDR_CHAN_REG(REG_C0H, subdev_channel));

/* Load the pre-load register 1 low word */
value = (short)(insn->data[3] & 0xFFFF);
value = (short)(data[3] & 0xFFFF);
outw(value, ADDR_CHAN_REG(REG_C0L, subdev_channel));

/* Write the Counter Control Register */
if (insn->data[4] != 0) {
value = (short)(insn->data[4] & 0xFFFF);
if (data[4] != 0) {
value = (short)(data[4] & 0xFFFF);
outw(value, ADDR_CHAN_REG(REG_C0C, subdev_channel));
}
break;
Expand Down Expand Up @@ -505,14 +504,14 @@ static int s526_gpct_winsn(struct comedi_device *dev,
pulse frequency on the selected source
*/
printk(KERN_INFO "S526: INSN_WRITE: PTG\n");
if ((insn->data[1] > insn->data[0]) && (insn->data[0] > 0)) {
if ((data[1] > data[0]) && (data[0] > 0)) {
(devpriv->s526_gpct_config[subdev_channel]).data[0] =
insn->data[0];
data[0];
(devpriv->s526_gpct_config[subdev_channel]).data[1] =
insn->data[1];
data[1];
} else {
printk(KERN_ERR "s526: INSN_WRITE: PTG: Problem with Pulse params -> %d %d\n",
insn->data[0], insn->data[1]);
data[0], data[1]);
return -EINVAL;
}

Expand Down

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