---

yaml
---
r: 367246
b: refs/heads/master
c: 4a89922
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: e851b58cb77b47a5c14267723bd6b76655d21840
+refs/heads/master: 4a8992271c843cb5bcd3321bf6a02eb251280b1d

trunk/arch/arm64/include/asm/Kbuild

@@ -39,7 +39,6 @@ generic-y += shmbuf.h
 generic-y += sizes.h
 generic-y += socket.h
 generic-y += sockios.h
-generic-y += string.h
 generic-y += switch_to.h
 generic-y += swab.h
 generic-y += termbits.h

trunk/arch/arm64/include/asm/cputype.h

@@ -17,7 +17,6 @@
 #define __ASM_CPUTYPE_H
 
 #define ID_MIDR_EL1		"midr_el1"
-#define ID_MPIDR_EL1		"mpidr_el1"
 #define ID_CTR_EL0		"ctr_el0"
 
 #define ID_AA64PFR0_EL1		"id_aa64pfr0_el1"
@@ -26,24 +25,12 @@
 #define ID_AA64ISAR0_EL1	"id_aa64isar0_el1"
 #define ID_AA64MMFR0_EL1	"id_aa64mmfr0_el1"
 
-#define INVALID_HWID		ULONG_MAX
-
-#define MPIDR_HWID_BITMASK	0xff00ffffff
-
 #define read_cpuid(reg) ({						\
 	u64 __val;							\
 	asm("mrs	%0, " reg : "=r" (__val));			\
 	__val;								\
 })
 
-#define ARM_CPU_IMP_ARM		0x41
-
-#define ARM_CPU_PART_AEM_V8	0xD0F0
-#define ARM_CPU_PART_FOUNDATION	0xD000
-#define ARM_CPU_PART_CORTEX_A57	0xD070
-
-#ifndef __ASSEMBLY__
-
 /*
  * The CPU ID never changes at run time, so we might as well tell the
  * compiler that it's constant.  Use this function to read the CPU ID
@@ -54,26 +41,9 @@ static inline u32 __attribute_const__ read_cpuid_id(void)
 	return read_cpuid(ID_MIDR_EL1);
 }
 
-static inline u64 __attribute_const__ read_cpuid_mpidr(void)
-{
-	return read_cpuid(ID_MPIDR_EL1);
-}
-
-static inline unsigned int __attribute_const__ read_cpuid_implementor(void)
-{
-	return (read_cpuid_id() & 0xFF000000) >> 24;
-}
-
-static inline unsigned int __attribute_const__ read_cpuid_part_number(void)
-{
-	return (read_cpuid_id() & 0xFFF0);
-}
-
 static inline u32 __attribute_const__ read_cpuid_cachetype(void)
 {
 	return read_cpuid(ID_CTR_EL0);
 }
 
-#endif /* __ASSEMBLY__ */
-
 #endif

trunk/arch/arm64/include/asm/exception.h

@@ -19,6 +19,5 @@
 #define __ASM_EXCEPTION_H
 
 #define __exception	__attribute__((section(".exception.text")))
-#define __exception_irq_entry	__exception
 
 #endif	/* __ASM_EXCEPTION_H */

trunk/arch/arm64/include/asm/hardirq.h

@@ -49,9 +49,4 @@ static inline void ack_bad_irq(unsigned int irq)
 
 extern void handle_IRQ(unsigned int, struct pt_regs *);
 
-/*
- * No arch-specific IRQ flags.
- */
-#define set_irq_flags(irq, flags)
-
 #endif /* __ASM_HARDIRQ_H */

trunk/arch/arm64/include/asm/irq.h

@@ -4,6 +4,5 @@
 #include <asm-generic/irq.h>
 
 extern void (*handle_arch_irq)(struct pt_regs *);
-extern void set_handle_irq(void (*handle_irq)(struct pt_regs *));
 
 #endif

trunk/arch/arm64/include/asm/smp_plat.h → trunk/arch/arm64/include/asm/string.h

@@ -1,9 +1,7 @@
 /*
- * Definitions specific to SMP platforms.
- *
  * Copyright (C) 2013 ARM Ltd.
  *
- * This program is free software: you can redistribute it and/or modify
+ * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  *
@@ -15,16 +13,19 @@
  * You should have received a copy of the GNU General Public License
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
+#ifndef __ASM_STRING_H
+#define __ASM_STRING_H
 
-#ifndef __ASM_SMP_PLAT_H
-#define __ASM_SMP_PLAT_H
+#define __HAVE_ARCH_MEMCPY
+extern void *memcpy(void *, const void *, __kernel_size_t);
 
-#include <asm/types.h>
+#define __HAVE_ARCH_MEMMOVE
+extern void *memmove(void *, const void *, __kernel_size_t);
 
-/*
- * Logical CPU mapping.
- */
-extern u64 __cpu_logical_map[NR_CPUS];
-#define cpu_logical_map(cpu)    __cpu_logical_map[cpu]
+#define __HAVE_ARCH_MEMCHR
+extern void *memchr(const void *, int, __kernel_size_t);
+
+#define __HAVE_ARCH_MEMSET
+extern void *memset(void *, int, __kernel_size_t);
 
-#endif /* __ASM_SMP_PLAT_H */
+#endif

trunk/arch/arm64/kernel/arm64ksyms.c

@@ -46,3 +46,9 @@ EXPORT_SYMBOL(__atomic_hash);
 
 	/* physical memory */
 EXPORT_SYMBOL(memstart_addr);
+
+	/* string / mem functions */
+EXPORT_SYMBOL(memset);
+EXPORT_SYMBOL(memcpy);
+EXPORT_SYMBOL(memmove);
+EXPORT_SYMBOL(memchr);

trunk/arch/arm64/kernel/early_printk.c

@@ -24,7 +24,6 @@
 #include <linux/io.h>
 
 #include <linux/amba/serial.h>
-#include <linux/serial_reg.h>
 
 static void __iomem *early_base;
 static void (*printch)(char ch);
@@ -41,47 +40,13 @@ static void pl011_printch(char ch)
 		;
 }
 
-/*
- * Semihosting-based debug console
- */
-static void smh_printch(char ch)
-{
-	asm volatile("mov  x1, %0\n"
-		     "mov  x0, #3\n"
-		     "hlt  0xf000\n"
-		     : : "r" (&ch) : "x0", "x1", "memory");
-}
-
-/*
- * 8250/16550 (8-bit aligned registers) single character TX.
- */
-static void uart8250_8bit_printch(char ch)
-{
-	while (!(readb_relaxed(early_base + UART_LSR) & UART_LSR_THRE))
-		;
-	writeb_relaxed(ch, early_base + UART_TX);
-}
-
-/*
- * 8250/16550 (32-bit aligned registers) single character TX.
- */
-static void uart8250_32bit_printch(char ch)
-{
-	while (!(readl_relaxed(early_base + (UART_LSR << 2)) & UART_LSR_THRE))
-		;
-	writel_relaxed(ch, early_base + (UART_TX << 2));
-}
-
 struct earlycon_match {
 	const char *name;
 	void (*printch)(char ch);
 };
 
 static const struct earlycon_match earlycon_match[] __initconst = {
 	{ .name = "pl011", .printch = pl011_printch, },
-	{ .name = "smh", .printch = smh_printch, },
-	{ .name = "uart8250-8bit", .printch = uart8250_8bit_printch, },
-	{ .name = "uart8250-32bit", .printch = uart8250_32bit_printch, },
 	{}
 };
 

trunk/arch/arm64/kernel/head.S

@@ -26,7 +26,6 @@
 #include <asm/assembler.h>
 #include <asm/ptrace.h>
 #include <asm/asm-offsets.h>
-#include <asm/cputype.h>
 #include <asm/memory.h>
 #include <asm/thread_info.h>
 #include <asm/pgtable-hwdef.h>
@@ -230,8 +229,7 @@ ENTRY(secondary_holding_pen)
 	bl	__calc_phys_offset		// x24=phys offset
 	bl	el2_setup			// Drop to EL1
 	mrs	x0, mpidr_el1
-	ldr     x1, =MPIDR_HWID_BITMASK
-	and	x0, x0, x1
+	and	x0, x0, #15			// CPU number
 	adr	x1, 1b
 	ldp	x2, x3, [x1]
 	sub	x1, x1, x2

trunk/arch/arm64/kernel/irq.c

@@ -25,7 +25,7 @@
 #include <linux/irq.h>
 #include <linux/smp.h>
 #include <linux/init.h>
-#include <linux/irqchip.h>
+#include <linux/of_irq.h>
 #include <linux/seq_file.h>
 #include <linux/ratelimit.h>
 
@@ -67,17 +67,18 @@ void handle_IRQ(unsigned int irq, struct pt_regs *regs)
 	set_irq_regs(old_regs);
 }
 
-void __init set_handle_irq(void (*handle_irq)(struct pt_regs *))
-{
-	if (handle_arch_irq)
-		return;
-
-	handle_arch_irq = handle_irq;
-}
+/*
+ * Interrupt controllers supported by the kernel.
+ */
+static const struct of_device_id intctrl_of_match[] __initconst = {
+	/* IRQ controllers { .compatible, .data } info to go here */
+	{}
+};
 
 void __init init_IRQ(void)
 {
-	irqchip_init();
+	of_irq_init(intctrl_of_match);
+
 	if (!handle_arch_irq)
 		panic("No interrupt controller found.");
 }

trunk/arch/arm64/kernel/setup.c

@@ -32,7 +32,6 @@
 #include <linux/kexec.h>
 #include <linux/crash_dump.h>
 #include <linux/root_dev.h>
-#include <linux/clk-provider.h>
 #include <linux/cpu.h>
 #include <linux/interrupt.h>
 #include <linux/smp.h>
@@ -47,7 +46,6 @@
 #include <asm/cputable.h>
 #include <asm/sections.h>
 #include <asm/setup.h>
-#include <asm/smp_plat.h>
 #include <asm/cacheflush.h>
 #include <asm/tlbflush.h>
 #include <asm/traps.h>
@@ -242,8 +240,6 @@ static void __init request_standard_resources(void)
 	}
 }
 
-u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
-
 void __init setup_arch(char **cmdline_p)
 {
 	setup_processor();
@@ -268,7 +264,6 @@ void __init setup_arch(char **cmdline_p)
 
 	psci_init();
 
-	cpu_logical_map(0) = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
 #ifdef CONFIG_SMP
 	smp_init_cpus();
 #endif
@@ -282,13 +277,6 @@ void __init setup_arch(char **cmdline_p)
 #endif
 }
 
-static int __init arm64_of_clk_init(void)
-{
-	of_clk_init(NULL);
-	return 0;
-}
-arch_initcall(arm64_of_clk_init);
-
 static DEFINE_PER_CPU(struct cpu, cpu_data);
 
 static int __init topology_init(void)