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yaml
---
r: 158101
b: refs/heads/master
c: 2b681fa
h: refs/heads/master
i:
  158099: fa429ef
v: v3
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Joerg Roedel committed Sep 3, 2009
1 parent dc2615c commit 11a60d8
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Showing 7 changed files with 267 additions and 61 deletions.
2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: abdc5eb3d69279039ba6cb89719913d08013ab14
refs/heads/master: 2b681fafcc50fea6304ed418667c9d04282acb73
1 change: 0 additions & 1 deletion trunk/arch/x86/Kconfig
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Expand Up @@ -586,7 +586,6 @@ config GART_IOMMU
bool "GART IOMMU support" if EMBEDDED
default y
select SWIOTLB
select AGP
depends on X86_64 && PCI
---help---
Support for full DMA access of devices with 32bit memory access only
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1 change: 1 addition & 0 deletions trunk/arch/x86/include/asm/amd_iommu.h
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Expand Up @@ -25,6 +25,7 @@
#ifdef CONFIG_AMD_IOMMU
extern int amd_iommu_init(void);
extern int amd_iommu_init_dma_ops(void);
extern int amd_iommu_init_passthrough(void);
extern void amd_iommu_detect(void);
extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
extern void amd_iommu_flush_all_domains(void);
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12 changes: 11 additions & 1 deletion trunk/arch/x86/include/asm/amd_iommu_types.h
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Expand Up @@ -143,6 +143,7 @@
#define EVT_BUFFER_SIZE 8192 /* 512 entries */
#define EVT_LEN_MASK (0x9ULL << 56)

#define PAGE_MODE_NONE 0x00
#define PAGE_MODE_1_LEVEL 0x01
#define PAGE_MODE_2_LEVEL 0x02
#define PAGE_MODE_3_LEVEL 0x03
Expand Down Expand Up @@ -195,11 +196,14 @@
#define PD_DMA_OPS_MASK (1UL << 0) /* domain used for dma_ops */
#define PD_DEFAULT_MASK (1UL << 1) /* domain is a default dma_ops
domain for an IOMMU */
#define PD_PASSTHROUGH_MASK (1UL << 2) /* domain has no page
translation */

extern bool amd_iommu_dump;
#define DUMP_printk(format, arg...) \
do { \
if (amd_iommu_dump) \
printk(KERN_INFO "AMD IOMMU: " format, ## arg); \
printk(KERN_INFO "AMD-Vi: " format, ## arg); \
} while(0);

/*
Expand Down Expand Up @@ -339,6 +343,9 @@ struct amd_iommu {
/* if one, we need to send a completion wait command */
bool need_sync;

/* becomes true if a command buffer reset is running */
bool reset_in_progress;

/* default dma_ops domain for that IOMMU */
struct dma_ops_domain *default_dom;
};
Expand Down Expand Up @@ -459,4 +466,7 @@ static inline void amd_iommu_stats_init(void) { }

#endif /* CONFIG_AMD_IOMMU_STATS */

/* some function prototypes */
extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu);

#endif /* _ASM_X86_AMD_IOMMU_TYPES_H */
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