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yaml
---
r: 174751
b: refs/heads/master
c: ae21ee6
h: refs/heads/master
i:
  174749: b2a4967
  174747: 109187b
  174743: d435de9
  174735: dc944d0
  174719: 54ce1bc
v: v3
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Allen Kay authored and Jesse Barnes committed Nov 4, 2009
1 parent cc644d8 commit 11e9743
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Showing 5 changed files with 56 additions and 1 deletion.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 1ccbf5344c3daef046d2323190cc6807c44f1917
refs/heads/master: ae21ee65e8bc228416bbcc8a1da01c56a847a60c
35 changes: 35 additions & 0 deletions trunk/drivers/pci/pci.c
Original file line number Diff line number Diff line change
Expand Up @@ -1545,6 +1545,41 @@ void pci_enable_ari(struct pci_dev *dev)
bridge->ari_enabled = 1;
}

/**
* pci_enable_acs - enable ACS if hardware support it
* @dev: the PCI device
*/
void pci_enable_acs(struct pci_dev *dev)
{
int pos;
u16 cap;
u16 ctrl;

if (!dev->is_pcie)
return;

pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ACS);
if (!pos)
return;

pci_read_config_word(dev, pos + PCI_ACS_CAP, &cap);
pci_read_config_word(dev, pos + PCI_ACS_CTRL, &ctrl);

/* Source Validation */
ctrl |= (cap & PCI_ACS_SV);

/* P2P Request Redirect */
ctrl |= (cap & PCI_ACS_RR);

/* P2P Completion Redirect */
ctrl |= (cap & PCI_ACS_CR);

/* Upstream Forwarding */
ctrl |= (cap & PCI_ACS_UF);

pci_write_config_word(dev, pos + PCI_ACS_CTRL, ctrl);
}

/**
* pci_swizzle_interrupt_pin - swizzle INTx for device behind bridge
* @dev: the PCI device
Expand Down
2 changes: 2 additions & 0 deletions trunk/drivers/pci/pci.h
Original file line number Diff line number Diff line change
Expand Up @@ -311,4 +311,6 @@ static inline int pci_resource_alignment(struct pci_dev *dev,
return resource_alignment(res);
}

extern void pci_enable_acs(struct pci_dev *dev);

#endif /* DRIVERS_PCI_H */
5 changes: 5 additions & 0 deletions trunk/drivers/pci/probe.c
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Expand Up @@ -10,6 +10,7 @@
#include <linux/module.h>
#include <linux/cpumask.h>
#include <linux/pci-aspm.h>
#include <linux/iommu.h>
#include "pci.h"

#define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */
Expand Down Expand Up @@ -1004,6 +1005,10 @@ static void pci_init_capabilities(struct pci_dev *dev)

/* Single Root I/O Virtualization */
pci_iov_init(dev);

/* Enable ACS P2P upstream forwarding */
if (iommu_found())
pci_enable_acs(dev);
}

void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
Expand Down
13 changes: 13 additions & 0 deletions trunk/include/linux/pci_regs.h
Original file line number Diff line number Diff line change
Expand Up @@ -502,6 +502,7 @@
#define PCI_EXT_CAP_ID_VC 2
#define PCI_EXT_CAP_ID_DSN 3
#define PCI_EXT_CAP_ID_PWR 4
#define PCI_EXT_CAP_ID_ACS 13
#define PCI_EXT_CAP_ID_ARI 14
#define PCI_EXT_CAP_ID_ATS 15
#define PCI_EXT_CAP_ID_SRIOV 16
Expand Down Expand Up @@ -662,4 +663,16 @@
#define PCI_SRIOV_VFM_MO 0x2 /* Active.MigrateOut */
#define PCI_SRIOV_VFM_AV 0x3 /* Active.Available */

/* Access Control Service */
#define PCI_ACS_CAP 0x04 /* ACS Capability Register */
#define PCI_ACS_SV 0x01 /* Source Validation */
#define PCI_ACS_TB 0x02 /* Translation Blocking */
#define PCI_ACS_RR 0x04 /* P2P Request Redirect */
#define PCI_ACS_CR 0x08 /* P2P Completion Redirect */
#define PCI_ACS_UF 0x10 /* Upstream Forwarding */
#define PCI_ACS_EC 0x20 /* P2P Egress Control */
#define PCI_ACS_DT 0x40 /* Direct Translated P2P */
#define PCI_ACS_CTRL 0x06 /* ACS Control Register */
#define PCI_ACS_EGRESS_CTL_V 0x08 /* ACS Egress Control Vector */

#endif /* LINUX_PCI_REGS_H */

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