---

yaml
---
r: 305369
b: refs/heads/master
c: f13bfcc
h: refs/heads/master
i:
  305367: 402e239
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: a7243c1d09ade57d8d48a350753dc2d1af735805
+refs/heads/master: f13bfcc6961a5c9f511c401292db522edcd0b061

trunk/arch/powerpc/include/asm/exception-64s.h

@@ -288,6 +288,13 @@ label##_hv:								\
 /* Exception addition: Hard disable interrupts */
 #define DISABLE_INTS	SOFT_DISABLE_INTS(r10,r11)
 
+/* Exception addition: Keep interrupt state */
+#define ENABLE_INTS				\
+	ld	r11,PACAKMSR(r13);		\
+	ld	r12,_MSR(r1);			\
+	rlwimi	r11,r12,0,MSR_EE;		\
+	mtmsrd	r11,1
+
 #define ADD_NVGPRS				\
 	bl	.save_nvgprs
 

trunk/arch/powerpc/include/asm/irq.h

@@ -18,6 +18,10 @@
 #include <linux/atomic.h>
 
 
+/* Define a way to iterate across irqs. */
+#define for_each_irq(i) \
+	for ((i) = 0; (i) < NR_IRQS; ++(i))
+
 extern atomic_t ppc_n_lost_interrupts;
 
 /* This number is used when no interrupt has been assigned */

trunk/arch/powerpc/include/asm/thread_info.h

@@ -126,6 +126,7 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_NOERROR		(1<<TIF_NOERROR)
 #define _TIF_NOTIFY_RESUME	(1<<TIF_NOTIFY_RESUME)
 #define _TIF_SYSCALL_TRACEPOINT	(1<<TIF_SYSCALL_TRACEPOINT)
+#define _TIF_RUNLATCH		(1<<TIF_RUNLATCH)
 #define _TIF_SYSCALL_T_OR_A	(_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \
 				 _TIF_SECCOMP | _TIF_SYSCALL_TRACEPOINT)
 

trunk/arch/powerpc/kernel/entry_64.S

@@ -763,6 +763,16 @@ do_work:
 	SOFT_DISABLE_INTS(r3,r4)
 1:	bl	.preempt_schedule_irq
 
+	/* Hard-disable interrupts again (and update PACA) */
+#ifdef CONFIG_PPC_BOOK3E
+	wrteei	0
+#else
+	ld	r10,PACAKMSR(r13) /* Get kernel MSR without EE */
+	mtmsrd	r10,1
+#endif /* CONFIG_PPC_BOOK3E */
+	li	r0,PACA_IRQ_HARD_DIS
+	stb	r0,PACAIRQHAPPENED(r13)
+
 	/* Re-test flags and eventually loop */
 	clrrdi	r9,r1,THREAD_SHIFT
 	ld	r4,TI_FLAGS(r9)
@@ -773,6 +783,14 @@ do_work:
 user_work:
 #endif /* CONFIG_PREEMPT */
 
+	/* Enable interrupts */
+#ifdef CONFIG_PPC_BOOK3E
+	wrteei	1
+#else
+	ori	r10,r10,MSR_EE
+	mtmsrd	r10,1
+#endif /* CONFIG_PPC_BOOK3E */
+
 	andi.	r0,r4,_TIF_NEED_RESCHED
 	beq	1f
 	bl	.restore_interrupts

trunk/arch/powerpc/kernel/exceptions-64s.S

@@ -764,8 +764,8 @@ alignment_common:
 	std	r3,_DAR(r1)
 	std	r4,_DSISR(r1)
 	bl	.save_nvgprs
-	DISABLE_INTS
 	addi	r3,r1,STACK_FRAME_OVERHEAD
+	ENABLE_INTS
 	bl	.alignment_exception
 	b	.ret_from_except
 

trunk/arch/powerpc/kernel/irq.c

@@ -260,17 +260,11 @@ EXPORT_SYMBOL(arch_local_irq_restore);
  * if they are currently disabled. This is typically called before
  * schedule() or do_signal() when returning to userspace. We do it
  * in C to avoid the burden of dealing with lockdep etc...
- *
- * NOTE: This is called with interrupts hard disabled but not marked
- * as such in paca->irq_happened, so we need to resync this.
  */
 void restore_interrupts(void)
 {
-	if (irqs_disabled()) {
-		local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
+	if (irqs_disabled())
 		local_irq_enable();
-	} else
-		__hard_irq_enable();
 }
 
 #endif /* CONFIG_PPC64 */
@@ -336,10 +330,14 @@ void migrate_irqs(void)
 
 	alloc_cpumask_var(&mask, GFP_KERNEL);
 
-	for_each_irq_desc(irq, desc) {
+	for_each_irq(irq) {
 		struct irq_data *data;
 		struct irq_chip *chip;
 
+		desc = irq_to_desc(irq);
+		if (!desc)
+			continue;
+
 		data = irq_desc_get_irq_data(desc);
 		if (irqd_is_per_cpu(data))
 			continue;

trunk/arch/powerpc/kernel/machine_kexec.c

@@ -23,11 +23,14 @@
 
 void machine_kexec_mask_interrupts(void) {
 	unsigned int i;
-	struct irq_desc *desc;
 
-	for_each_irq_desc(i, desc) {
+	for_each_irq(i) {
+		struct irq_desc *desc = irq_to_desc(i);
 		struct irq_chip *chip;
 
+		if (!desc)
+			continue;
+
 		chip = irq_desc_get_chip(desc);
 		if (!chip)
 			continue;

trunk/arch/powerpc/kernel/misc_32.S

@@ -761,8 +761,12 @@ relocate_new_kernel:
 	mr	r30, r4
 	mr	r31, r5
 
-	/* Load our MSR_IS and TID to MMUCR for TLB search */
-	mfspr	r3,SPRN_PID
+	/* 
+	 * Load the PID with kernel PID (0).
+	 * Also load our MSR_IS and TID to MMUCR for TLB search.
+	 */
+	li	r3, 0
+	mtspr	SPRN_PID, r3
 	mfmsr	r4
 	andi.	r4,r4,MSR_IS@l
 	beq	wmmucr

trunk/arch/powerpc/kernel/traps.c

@@ -248,7 +248,7 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
 				   addr, regs->nip, regs->link, code);
 	}
 
-	if (arch_irqs_disabled() && !arch_irq_disabled_regs(regs))
+	if (!arch_irq_disabled_regs(regs))
 		local_irq_enable();
 
 	memset(&info, 0, sizeof(info));
@@ -1019,9 +1019,7 @@ void __kprobes program_check_exception(struct pt_regs *regs)
 		return;
 	}
 
-	/* We restore the interrupt state now */
-	if (!arch_irq_disabled_regs(regs))
-		local_irq_enable();
+	local_irq_enable();
 
 #ifdef CONFIG_MATH_EMULATION
 	/* (reason & REASON_ILLEGAL) would be the obvious thing here,
@@ -1071,10 +1069,6 @@ void alignment_exception(struct pt_regs *regs)
 {
 	int sig, code, fixed = 0;
 
-	/* We restore the interrupt state now */
-	if (!arch_irq_disabled_regs(regs))
-		local_irq_enable();
-
 	/* we don't implement logging of alignment exceptions */
 	if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS))
 		fixed = fix_alignment(regs);

trunk/arch/powerpc/platforms/cell/axon_msi.c

@@ -114,7 +114,7 @@ static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
 		pr_devel("axon_msi: woff %x roff %x msi %x\n",
 			  write_offset, msic->read_offset, msi);
 
-		if (msi < nr_irqs && irq_get_chip_data(msi) == msic) {
+		if (msi < NR_IRQS && irq_get_chip_data(msi) == msic) {
 			generic_handle_irq(msi);
 			msic->fifo_virt[idx] = cpu_to_le32(0xffffffff);
 		} else {
@@ -276,6 +276,9 @@ static int axon_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
 	if (rc)
 		return rc;
 
+	/* We rely on being able to stash a virq in a u16 */
+	BUILD_BUG_ON(NR_IRQS > 65536);
+
 	list_for_each_entry(entry, &dev->msi_list, list) {
 		virq = irq_create_direct_mapping(msic->irq_domain);
 		if (virq == NO_IRQ) {
@@ -389,8 +392,7 @@ static int axon_msi_probe(struct platform_device *device)
 	}
 	memset(msic->fifo_virt, 0xff, MSIC_FIFO_SIZE_BYTES);
 
-	/* We rely on being able to stash a virq in a u16, so limit irqs to < 65536 */
-	msic->irq_domain = irq_domain_add_nomap(dn, 65536, &msic_host_ops, msic);
+	msic->irq_domain = irq_domain_add_nomap(dn, 0, &msic_host_ops, msic);
 	if (!msic->irq_domain) {
 		printk(KERN_ERR "axon_msi: couldn't allocate irq_domain for %s\n",
 		       dn->full_name);

trunk/arch/powerpc/platforms/cell/beat_interrupt.c

@@ -248,6 +248,6 @@ void beatic_deinit_IRQ(void)
 {
 	int	i;
 
-	for (i = 1; i < nr_irqs; i++)
+	for (i = 1; i < NR_IRQS; i++)
 		beat_destruct_irq_plug(i);
 }

trunk/arch/powerpc/platforms/powermac/pic.c

@@ -57,9 +57,9 @@ static int max_real_irqs;
 
 static DEFINE_RAW_SPINLOCK(pmac_pic_lock);
 
-/* The max irq number this driver deals with is 128; see max_irqs */
-static DECLARE_BITMAP(ppc_lost_interrupts, 128);
-static DECLARE_BITMAP(ppc_cached_irq_mask, 128);
+#define NR_MASK_WORDS	((NR_IRQS + 31) / 32)
+static unsigned long ppc_lost_interrupts[NR_MASK_WORDS];
+static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
 static int pmac_irq_cascade = -1;
 static struct irq_domain *pmac_pic_host;
 

trunk/arch/powerpc/platforms/pseries/Kconfig

@@ -30,9 +30,9 @@ config PPC_SPLPAR
 	  two or more partitions.
 
 config EEH
-	bool
+	bool "PCI Extended Error Handling (EEH)" if EXPERT
 	depends on PPC_PSERIES && PCI
-	default y
+	default y if !EXPERT
 
 config PSERIES_MSI
        bool

trunk/arch/powerpc/sysdev/cpm2_pic.c

@@ -51,7 +51,8 @@
 static intctl_cpm2_t __iomem *cpm2_intctl;
 
 static struct irq_domain *cpm2_pic_host;
-static unsigned long ppc_cached_irq_mask[2]; /* 2 32-bit registers */
+#define NR_MASK_WORDS   ((NR_IRQS + 31) / 32)
+static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
 
 static const u_char irq_to_siureg[] = {
 	1, 1, 1, 1, 1, 1, 1, 1,

trunk/arch/powerpc/sysdev/mpc8xx_pic.c

@@ -18,45 +18,69 @@
 extern int cpm_get_irq(struct pt_regs *regs);
 
 static struct irq_domain *mpc8xx_pic_host;
-static unsigned long mpc8xx_cached_irq_mask;
+#define NR_MASK_WORDS   ((NR_IRQS + 31) / 32)
+static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
 static sysconf8xx_t __iomem *siu_reg;
 
-static inline unsigned long mpc8xx_irqd_to_bit(struct irq_data *d)
-{
-	return 0x80000000 >> irqd_to_hwirq(d);
-}
+int cpm_get_irq(struct pt_regs *regs);
 
 static void mpc8xx_unmask_irq(struct irq_data *d)
 {
-	mpc8xx_cached_irq_mask |= mpc8xx_irqd_to_bit(d);
-	out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
+	int	bit, word;
+	unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d);
+
+	bit = irq_nr & 0x1f;
+	word = irq_nr >> 5;
+
+	ppc_cached_irq_mask[word] |= (1 << (31-bit));
+	out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
 }
 
 static void mpc8xx_mask_irq(struct irq_data *d)
 {
-	mpc8xx_cached_irq_mask &= ~mpc8xx_irqd_to_bit(d);
-	out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
+	int	bit, word;
+	unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d);
+
+	bit = irq_nr & 0x1f;
+	word = irq_nr >> 5;
+
+	ppc_cached_irq_mask[word] &= ~(1 << (31-bit));
+	out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
 }
 
 static void mpc8xx_ack(struct irq_data *d)
 {
-	out_be32(&siu_reg->sc_sipend, mpc8xx_irqd_to_bit(d));
+	int	bit;
+	unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d);
+
+	bit = irq_nr & 0x1f;
+	out_be32(&siu_reg->sc_sipend, 1 << (31-bit));
 }
 
 static void mpc8xx_end_irq(struct irq_data *d)
 {
-	mpc8xx_cached_irq_mask |= mpc8xx_irqd_to_bit(d);
-	out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
+	int bit, word;
+	unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d);
+
+	bit = irq_nr & 0x1f;
+	word = irq_nr >> 5;
+
+	ppc_cached_irq_mask[word] |= (1 << (31-bit));
+	out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
 }
 
 static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type)
 {
-	/* only external IRQ senses are programmable */
-	if ((flow_type & IRQ_TYPE_EDGE_FALLING) && !(irqd_to_hwirq(d) & 1)) {
+	if (flow_type & IRQ_TYPE_EDGE_FALLING) {
+		irq_hw_number_t hw = (unsigned int)irqd_to_hwirq(d);
 		unsigned int siel = in_be32(&siu_reg->sc_siel);
-		siel |= mpc8xx_irqd_to_bit(d);
-		out_be32(&siu_reg->sc_siel, siel);
-		__irq_set_handler_locked(d->irq, handle_edge_irq);
+
+		/* only external IRQ senses are programmable */
+		if ((hw & 1) == 0) {
+			siel |= (0x80000000 >> hw);
+			out_be32(&siu_reg->sc_siel, siel);
+			__irq_set_handler_locked(d->irq, handle_edge_irq);
+		}
 	}
 	return 0;
 }
@@ -108,9 +132,6 @@ static int mpc8xx_pic_host_xlate(struct irq_domain *h, struct device_node *ct,
 		IRQ_TYPE_EDGE_FALLING,
 	};
 
-	if (intspec[0] > 0x1f)
-		return 0;
-
 	*out_hwirq = intspec[0];
 	if (intsize > 1 && intspec[1] < 4)
 		*out_flags = map_pic_senses[intspec[1]];

trunk/arch/powerpc/sysdev/xics/xics-common.c

@@ -188,7 +188,6 @@ void xics_migrate_irqs_away(void)
 {
 	int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id();
 	unsigned int irq, virq;
-	struct irq_desc *desc;
 
 	/* If we used to be the default server, move to the new "boot_cpuid" */
 	if (hw_cpu == xics_default_server)
@@ -203,7 +202,8 @@ void xics_migrate_irqs_away(void)
 	/* Allow IPIs again... */
 	icp_ops->set_priority(DEFAULT_PRIORITY);
 
-	for_each_irq_desc(virq, desc) {
+	for_each_irq(virq) {
+		struct irq_desc *desc;
 		struct irq_chip *chip;
 		long server;
 		unsigned long flags;
@@ -212,8 +212,9 @@ void xics_migrate_irqs_away(void)
 		/* We can't set affinity on ISA interrupts */
 		if (virq < NUM_ISA_INTERRUPTS)
 			continue;
+		desc = irq_to_desc(virq);
 		/* We only need to migrate enabled IRQS */
-		if (!desc->action)
+		if (!desc || !desc->action)
 			continue;
 		if (desc->irq_data.domain != xics_host)
 			continue;

trunk/drivers/macintosh/windfarm_pm91.c

@@ -234,7 +234,7 @@ static void wf_smu_cpu_fans_tick(struct wf_smu_cpu_fans_state *st)
 		return;
 	}
 
-	rc = wf_sensor_get(sensor_cpu_power, &power);
+	rc = wf_sensor_get(&sensor_cpu_power, &power);
 	if (rc) {
 		printk(KERN_WARNING "windfarm: CPU power sensor error %d\n",
 		       rc);