---

yaml
---
r: 319645
b: refs/heads/master
c: cedc8ef
h: refs/heads/master
i:
  319643: 6a28d0b
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 9afd40811538d82164f42dcdabdcf0f7065044a7
+refs/heads/master: cedc8ef87c3349a6645e285f920715380dd25ddc

trunk/arch/mips/Kbuild.platforms

@@ -14,7 +14,6 @@ platforms += jz4740
 platforms += lantiq
 platforms += lasat
 platforms += loongson
-platforms += loongson1
 platforms += mipssim
 platforms += mti-malta
 platforms += netlogic

trunk/arch/mips/Kconfig

@@ -264,16 +264,6 @@ config MACH_LOONGSON
 	  Chinese Academy of Sciences (CAS) in the People's Republic
 	  of China. The chief architect is Professor Weiwu Hu.
 
-config MACH_LOONGSON1
-	bool "Loongson 1 family of machines"
-	select SYS_SUPPORTS_ZBOOT
-	help
-	  This enables support for the Loongson 1 based machines.
-
-	  Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by
-	  the ICT (Institute of Computing Technology) and the Chinese Academy
-	  of Sciences.
-
 config MIPS_MALTA
 	bool "MIPS Malta board"
 	select ARCH_MAY_HAVE_PC_FDC
@@ -846,7 +836,6 @@ source "arch/mips/txx9/Kconfig"
 source "arch/mips/vr41xx/Kconfig"
 source "arch/mips/cavium-octeon/Kconfig"
 source "arch/mips/loongson/Kconfig"
-source "arch/mips/loongson1/Kconfig"
 source "arch/mips/netlogic/Kconfig"
 
 endmenu
@@ -1228,14 +1217,6 @@ config CPU_LOONGSON2F
 	  have a similar programming interface with FPGA northbridge used in
 	  Loongson2E.
 
-config CPU_LOONGSON1B
-	bool "Loongson 1B"
-	depends on SYS_HAS_CPU_LOONGSON1B
-	select CPU_LOONGSON1
-	help
-	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
-	  release 2 instruction set.
-
 config CPU_MIPS32_R1
 	bool "MIPS32 Release 1"
 	depends on SYS_HAS_CPU_MIPS32_R1
@@ -1563,14 +1544,6 @@ config CPU_LOONGSON2
 	select CPU_SUPPORTS_64BIT_KERNEL
 	select CPU_SUPPORTS_HIGHMEM
 
-config CPU_LOONGSON1
-	bool
-	select CPU_MIPS32
-	select CPU_MIPSR2
-	select CPU_HAS_PREFETCH
-	select CPU_SUPPORTS_32BIT_KERNEL
-	select CPU_SUPPORTS_HIGHMEM
-
 config CPU_BMIPS
 	bool
 	select CPU_MIPS32
@@ -1589,9 +1562,6 @@ config SYS_HAS_CPU_LOONGSON2F
 	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
 	select CPU_SUPPORTS_UNCACHED_ACCELERATED
 
-config SYS_HAS_CPU_LOONGSON1B
-	bool
-
 config SYS_HAS_CPU_MIPS32_R1
 	bool
 

trunk/arch/mips/include/asm/cpu.h

@@ -197,7 +197,6 @@
 #define PRID_REV_VR4181A	0x0070	/* Same as VR4122 */
 #define PRID_REV_VR4130		0x0080
 #define PRID_REV_34K_V1_0_2	0x0022
-#define PRID_REV_LOONGSON1B	0x0020
 #define PRID_REV_LOONGSON2E	0x0002
 #define PRID_REV_LOONGSON2F	0x0003
 
@@ -262,7 +261,7 @@ enum cpu_type_enum {
 	 */
 	CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
 	CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350,
-	CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, CPU_LOONGSON1, CPU_M14KC,
+	CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, CPU_M14KC,
 
 	/*
 	 * MIPS64 class processors