drm/i915: CR clock gating is recommend to be set on PineView

The specs recommend that this bit be set on PineView. No reason is given, but it sounds like a powersaving bit that we should expect the BIOS to be setting... v2: Rebase on top of _MASKED_ENABLE_BIT Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
git-mirror · May 3, 2012 · 13a86b8 · 13a86b8
1 parent 1070a42
commit 13a86b8
Showing 1 changed file with 3 additions and 0 deletions.
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
@@ -2878,6 +2878,9 @@ static void gen3_init_clock_gating(struct drm_device *dev)
 	dstate |= DSTATE_PLL_D3_OFF | DSTATE_GFX_CLOCK_GATING |
 		DSTATE_DOT_CLOCK_GATING;
 	I915_WRITE(D_STATE, dstate);
+
+	if (IS_PINEVIEW(dev))
+		I915_WRITE(ECOSKPD, _MASKED_BIT_ENABLE(ECO_GATING_CX_ONLY));
 }
 
 static void i85x_init_clock_gating(struct drm_device *dev)