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yaml --- r: 144151 b: refs/heads/master c: 9f5a691 h: refs/heads/master i: 144149: 02a6cab 144147: 5de4343 144143: 91f5364 v: v3
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Linus Torvalds
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--- | ||
refs/heads/master: f57f2fe2a39338c47b67fbd564a9d3b7587bcbee | ||
refs/heads/master: 9f5a691253924fd033a58c6b1fed57bb0a4eccf4 |
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CFI or JEDEC memory-mapped NOR flash | ||
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Flash chips (Memory Technology Devices) are often used for solid state | ||
file systems on embedded devices. | ||
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- compatible : should contain the specific model of flash chip(s) | ||
used, if known, followed by either "cfi-flash" or "jedec-flash" | ||
- reg : Address range(s) of the flash chip(s) | ||
It's possible to (optionally) define multiple "reg" tuples so that | ||
non-identical NOR chips can be described in one flash node. | ||
- bank-width : Width (in bytes) of the flash bank. Equal to the | ||
device width times the number of interleaved chips. | ||
- device-width : (optional) Width of a single flash chip. If | ||
omitted, assumed to be equal to 'bank-width'. | ||
- #address-cells, #size-cells : Must be present if the flash has | ||
sub-nodes representing partitions (see below). In this case | ||
both #address-cells and #size-cells must be equal to 1. | ||
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For JEDEC compatible devices, the following additional properties | ||
are defined: | ||
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- vendor-id : Contains the flash chip's vendor id (1 byte). | ||
- device-id : Contains the flash chip's device id (1 byte). | ||
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In addition to the information on the flash bank itself, the | ||
device tree may optionally contain additional information | ||
describing partitions of the flash address space. This can be | ||
used on platforms which have strong conventions about which | ||
portions of the flash are used for what purposes, but which don't | ||
use an on-flash partition table such as RedBoot. | ||
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Each partition is represented as a sub-node of the flash device. | ||
Each node's name represents the name of the corresponding | ||
partition of the flash device. | ||
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Flash partitions | ||
- reg : The partition's offset and size within the flash bank. | ||
- label : (optional) The label / name for this flash partition. | ||
If omitted, the label is taken from the node name (excluding | ||
the unit address). | ||
- read-only : (optional) This parameter, if present, is a hint to | ||
Linux that this flash partition should only be mounted | ||
read-only. This is usually used for flash partitions | ||
containing early-boot firmware images or data which should not | ||
be clobbered. | ||
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Example: | ||
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flash@ff000000 { | ||
compatible = "amd,am29lv128ml", "cfi-flash"; | ||
reg = <ff000000 01000000>; | ||
bank-width = <4>; | ||
device-width = <1>; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
fs@0 { | ||
label = "fs"; | ||
reg = <0 f80000>; | ||
}; | ||
firmware@f80000 { | ||
label ="firmware"; | ||
reg = <f80000 80000>; | ||
read-only; | ||
}; | ||
}; | ||
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Here an example with multiple "reg" tuples: | ||
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flash@f0000000,0 { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
compatible = "intel,PC48F4400P0VB", "cfi-flash"; | ||
reg = <0 0x00000000 0x02000000 | ||
0 0x02000000 0x02000000>; | ||
bank-width = <2>; | ||
partition@0 { | ||
label = "test-part1"; | ||
reg = <0 0x04000000>; | ||
}; | ||
}; |
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/* | ||
* arch/arm/mach-kirkwood/include/mach/bridge-regs.h | ||
* | ||
* Mbus-L to Mbus Bridge Registers | ||
* | ||
* This file is licensed under the terms of the GNU General Public | ||
* License version 2. This program is licensed "as is" without any | ||
* warranty of any kind, whether express or implied. | ||
*/ | ||
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#ifndef __ASM_ARCH_BRIDGE_REGS_H | ||
#define __ASM_ARCH_BRIDGE_REGS_H | ||
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#include <mach/kirkwood.h> | ||
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#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) | ||
#define CPU_RESET 0x00000002 | ||
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#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) | ||
#define SOFT_RESET_OUT_EN 0x00000004 | ||
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#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) | ||
#define SOFT_RESET 0x00000001 | ||
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#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) | ||
#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114) | ||
#define BRIDGE_INT_TIMER0 0x0002 | ||
#define BRIDGE_INT_TIMER1 0x0004 | ||
#define BRIDGE_INT_TIMER1_CLR (~0x0004) | ||
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#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) | ||
#define IRQ_CAUSE_LOW_OFF 0x0000 | ||
#define IRQ_MASK_LOW_OFF 0x0004 | ||
#define IRQ_CAUSE_HIGH_OFF 0x0010 | ||
#define IRQ_MASK_HIGH_OFF 0x0014 | ||
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#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) | ||
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#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128) | ||
#define L2_WRITETHROUGH 0x00000010 | ||
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#endif |
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