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Jamie Iles
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Herbert Xu
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Aug 10, 2011
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trunk/Documentation/devicetree/bindings/crypto/picochip-spacc.txt
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Picochip picoXcell SPAcc (Security Protocol Accelerator) bindings | ||
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Picochip picoXcell devices contain crypto offload engines that may be used for | ||
IPSEC and femtocell layer 2 ciphering. | ||
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Required properties: | ||
- compatible : "picochip,spacc-ipsec" for the IPSEC offload engine | ||
"picochip,spacc-l2" for the femtocell layer 2 ciphering engine. | ||
- reg : Offset and length of the register set for this device | ||
- interrupt-parent : The interrupt controller that controls the SPAcc | ||
interrupt. | ||
- interrupts : The interrupt line from the SPAcc. | ||
- ref-clock : The input clock that drives the SPAcc. | ||
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Example SPAcc node: | ||
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spacc@10000 { | ||
compatible = "picochip,spacc-ipsec"; | ||
reg = <0x100000 0x10000>; | ||
interrupt-parent = <&vic0>; | ||
interrupts = <24>; | ||
ref-clock = <&ipsec_clk>, "ref"; | ||
}; |
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