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r: 347760
b: refs/heads/master
c: db7af96
h: refs/heads/master
v: v3
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Padmavathi Venna authored and Kukjin Kim committed Dec 19, 2012
1 parent dc506c0 commit 16e898c
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Showing 571 changed files with 5,915 additions and 9,451 deletions.
2 changes: 1 addition & 1 deletion [refs]
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---
refs/heads/master: f2420ec2d002d5183e61bdf9d8830f0e1c2a4af3
refs/heads/master: db7af96ee96d1c2f208611022740f9469158d3a8
8 changes: 0 additions & 8 deletions trunk/Documentation/devicetree/bindings/arm/davinci/nand.txt
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Expand Up @@ -23,9 +23,6 @@ Recommended properties :
- ti,davinci-nand-buswidth: buswidth 8 or 16
- ti,davinci-nand-use-bbt: use flash based bad block table support.

nand device bindings may contain additional sub-nodes describing
partitions of the address space. See partition.txt for more detail.

Example(da850 EVM ):
nand_cs3@62000000 {
compatible = "ti,davinci-nand";
Expand All @@ -38,9 +35,4 @@ nand_cs3@62000000 {
ti,davinci-ecc-mode = "hw";
ti,davinci-ecc-bits = <4>;
ti,davinci-nand-use-bbt;

partition@180000 {
label = "ubifs";
reg = <0x180000 0x7e80000>;
};
};
23 changes: 0 additions & 23 deletions trunk/Documentation/devicetree/bindings/mtd/denali-nand.txt

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49 changes: 0 additions & 49 deletions trunk/Documentation/devicetree/bindings/mtd/flctl-nand.txt

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12 changes: 7 additions & 5 deletions trunk/Documentation/devicetree/bindings/mtd/fsmc-nand.txt
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Expand Up @@ -3,7 +3,9 @@
Required properties:
- compatible : "st,spear600-fsmc-nand"
- reg : Address range of the mtd chip
- reg-names: Should contain the reg names "fsmc_regs", "nand_data", "nand_addr" and "nand_cmd"
- reg-names: Should contain the reg names "fsmc_regs" and "nand_data"
- st,ale-off : Chip specific offset to ALE
- st,cle-off : Chip specific offset to CLE

Optional properties:
- bank-width : Width (in bytes) of the device. If not present, the width
Expand All @@ -17,10 +19,10 @@ Example:
#address-cells = <1>;
#size-cells = <1>;
reg = <0xd1800000 0x1000 /* FSMC Register */
0xd2000000 0x0010 /* NAND Base DATA */
0xd2020000 0x0010 /* NAND Base ADDR */
0xd2010000 0x0010>; /* NAND Base CMD */
reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
0xd2000000 0x4000>; /* NAND Base */
reg-names = "fsmc_regs", "nand_data";
st,ale-off = <0x20000>;
st,cle-off = <0x10000>;

bank-width = <1>;
nand-skip-bbtscan;
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29 changes: 0 additions & 29 deletions trunk/Documentation/devicetree/bindings/mtd/m25p80.txt

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3 changes: 0 additions & 3 deletions trunk/Documentation/devicetree/bindings/mtd/mtd-physmap.txt
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Expand Up @@ -23,9 +23,6 @@ file systems on embedded devices.
unaligned accesses as implemented in the JFFS2 code via memcpy().
By defining "no-unaligned-direct-access", the flash will not be
exposed directly to the MTD users (e.g. JFFS2) any more.
- linux,mtd-name: allow to specify the mtd name for retro capability with
physmap-flash drivers as boot loader pass the mtd partition via the old
device name physmap-flash.

For JEDEC compatible devices, the following additional properties
are defined:
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Expand Up @@ -13,7 +13,7 @@ Recommended properties:

Example:

spi@7000c380 {
spi@7000d600 {
compatible = "nvidia,tegra20-sflash";
reg = <0x7000c380 0x80>;
interrupts = <0 39 0x04>;
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Expand Up @@ -13,7 +13,7 @@ Recommended properties:

Example:

spi@7000d600 {
slink@7000d600 {
compatible = "nvidia,tegra20-slink";
reg = <0x7000d600 0x200>;
interrupts = <0 82 0x04>;
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26 changes: 0 additions & 26 deletions trunk/Documentation/devicetree/bindings/spi/spi_atmel.txt

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10 changes: 0 additions & 10 deletions trunk/Documentation/hwmon/it87
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Expand Up @@ -209,13 +209,3 @@ doesn't use CPU cycles.
Trip points must be set properly before switching to automatic fan speed
control mode. The driver will perform basic integrity checks before
actually switching to automatic control mode.


Temperature offset attributes
-----------------------------

The driver supports temp[1-3]_offset sysfs attributes to adjust the reported
temperature for thermal diodes or diode-connected thermal transistors.
If a temperature sensor is configured for thermistors, the attribute values
are ignored. If the thermal sensor type is Intel PECI, the temperature offset
must be programmed to the critical CPU temperature.
3 changes: 1 addition & 2 deletions trunk/Documentation/x86/boot.txt
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Expand Up @@ -373,15 +373,14 @@ Protocol: 2.00+
1 Loadlin
2 bootsect-loader (0x20, all other values reserved)
3 Syslinux
4 Etherboot/gPXE/iPXE
4 Etherboot/gPXE
5 ELILO
7 GRUB
8 U-Boot
9 Xen
A Gujin
B Qemu
C Arcturus Networks uCbootloader
D kexec-tools
E Extended (see ext_loader_type)
F Special (0xFF = undefined)
10 Reserved
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44 changes: 0 additions & 44 deletions trunk/Documentation/xtensa/atomctl.txt

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5 changes: 2 additions & 3 deletions trunk/arch/arm/boot/dts/Makefile
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Expand Up @@ -107,7 +107,6 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
omap3-evm.dtb \
omap3-tobi.dtb \
omap4-panda.dtb \
omap4-panda-a4.dtb \
omap4-panda-es.dtb \
omap4-var-som.dtb \
omap4-sdp.dtb \
Expand All @@ -132,8 +131,8 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
spear320-evb.dtb \
spear320-hmi.dtb
dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun4i-a10-cubieboard.dtb \
sun5i-a13-olinuxino.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun4i-cubieboard.dtb \
sun5i-olinuxino.dtb
dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
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4 changes: 2 additions & 2 deletions trunk/arch/arm/boot/dts/at91sam9263.dtsi
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Expand Up @@ -368,14 +368,14 @@
compatible = "atmel,at91rm9200-ssc";
reg = <0xfff98000 0x4000>;
interrupts = <16 4 5>;
status = "disabled";
status = "disable";
};

ssc1: ssc@fff9c000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfff9c000 0x4000>;
interrupts = <17 4 5>;
status = "disabled";
status = "disable";
};

macb0: ethernet@fffbc000 {
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4 changes: 2 additions & 2 deletions trunk/arch/arm/boot/dts/at91sam9g45.dtsi
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Expand Up @@ -425,14 +425,14 @@
compatible = "atmel,at91sam9g45-ssc";
reg = <0xfff9c000 0x4000>;
interrupts = <16 4 5>;
status = "disabled";
status = "disable";
};

ssc1: ssc@fffa0000 {
compatible = "atmel,at91sam9g45-ssc";
reg = <0xfffa0000 0x4000>;
interrupts = <17 4 5>;
status = "disabled";
status = "disable";
};

adc0: adc@fffb0000 {
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2 changes: 1 addition & 1 deletion trunk/arch/arm/boot/dts/at91sam9x5.dtsi
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Expand Up @@ -92,7 +92,7 @@
compatible = "atmel,at91sam9g45-ssc";
reg = <0xf0010000 0x4000>;
interrupts = <28 4 5>;
status = "disabled";
status = "disable";
};

tcb0: timer@f8008000 {
Expand Down
8 changes: 4 additions & 4 deletions trunk/arch/arm/boot/dts/imx27-3ds.dts
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Expand Up @@ -21,17 +21,17 @@
};

soc {
aipi@10000000 { /* aipi1 */
aipi@10000000 { /* aipi */

uart1: serial@1000a000 {
fsl,uart-has-rtscts;
status = "okay";
};
};

aipi@10020000 { /* aipi2 */
ethernet@1002b000 {
fec@1002b000 {
status = "okay";
};
};
};

};
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