Skip to content

Commit

Permalink
---
Browse files Browse the repository at this point in the history
yaml
---
r: 272884
b: refs/heads/master
c: f80ca52
h: refs/heads/master
v: v3
  • Loading branch information
Will Deacon committed Oct 17, 2011
1 parent 2b935da commit 178b47f
Show file tree
Hide file tree
Showing 2 changed files with 6 additions and 2 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 1d3cfb34f9605578b4f733acba4affa751b2e4a2
refs/heads/master: f80ca52cab8f999246ed2e4daa90eb40cb810822
6 changes: 5 additions & 1 deletion trunk/arch/arm/mach-shmobile/smp-sh73a0.c
Original file line number Diff line number Diff line change
Expand Up @@ -74,6 +74,8 @@ void __cpuinit sh73a0_secondary_init(unsigned int cpu)

int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
{
cpu = cpu_logical_map(cpu);

/* enable cache coherency */
modify_scu_cpu_psr(0, 3 << (cpu * 8));

Expand All @@ -87,12 +89,14 @@ int __cpuinit sh73a0_boot_secondary(unsigned int cpu)

void __init sh73a0_smp_prepare_cpus(void)
{
int cpu = cpu_logical_map(0);

scu_enable(scu_base_addr());

/* Map the reset vector (in headsmp.S) */
__raw_writel(0, __io(APARMBAREA)); /* 4k */
__raw_writel(__pa(shmobile_secondary_vector), __io(SBAR));

/* enable cache coherency on CPU0 */
modify_scu_cpu_psr(0, 3 << (0 * 8));
modify_scu_cpu_psr(0, 3 << (cpu * 8));
}

0 comments on commit 178b47f

Please sign in to comment.