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r: 96344
b: refs/heads/master
c: ac44cc9
h: refs/heads/master
v: v3
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Thomas Gleixner authored and Ingo Molnar committed May 8, 2008
1 parent a3a99ef commit 1917f85
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Showing 301 changed files with 4,006 additions and 4,807 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 8e3e076c5a78519a9f64cd384e8f18bc21882ce0
refs/heads/master: ac44cc96fbc8f44c056fa37573e8447eec512b10
11 changes: 11 additions & 0 deletions trunk/Documentation/s390/CommonIO
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,17 @@ Command line parameters

Enable logging of debug information in case of ccw device timeouts.


* cio_msg = yes | no

Determines whether information on found devices and sensed device
characteristics should be shown during startup or when new devices are
found, i. e. messages of the types "Detected device 0.0.4711 on subchannel
0.0.0042" and "SenseID: Device 0.0.4711 reports: ...".

Default is off.


* cio_ignore = {all} |
{<device> | <range of devices>} |
{!<device> | !<range of devices>}
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2 changes: 0 additions & 2 deletions trunk/arch/arm/mach-orion5x/common.c
Original file line number Diff line number Diff line change
Expand Up @@ -223,9 +223,7 @@ static struct platform_device orion5x_eth = {

void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
{
eth_data->shared = &orion5x_eth_shared;
orion5x_eth.dev.platform_data = eth_data;

platform_device_register(&orion5x_eth_shared);
platform_device_register(&orion5x_eth);
}
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18 changes: 8 additions & 10 deletions trunk/arch/blackfin/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -832,7 +832,6 @@ config BANK_0
config BANK_1
hex "Bank 1"
default 0x7BB0
default 0x5558 if BF54x

config BANK_2
hex "Bank 2"
Expand Down Expand Up @@ -964,23 +963,22 @@ endchoice

endmenu

if (BF537 || BF533 || BF54x)

menu "CPU Frequency scaling"

source "drivers/cpufreq/Kconfig"

config CPU_VOLTAGE
bool "CPU Voltage scaling"
depends on EXPERIMENTAL
depends on CPU_FREQ
config CPU_FREQ
bool
default n
help
Say Y here if you want CPU voltage scaling according to the CPU frequency.
This option violates the PLL BYPASS recommendation in the Blackfin Processor
manuals. There is a theoretical risk that during VDDINT transitions
the PLL may unlock.

If you want to enable this option, you should select the
DPMC driver from Character Devices.
endmenu

endif

source "net/Kconfig"

source "drivers/Kconfig"
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3 changes: 3 additions & 0 deletions trunk/arch/blackfin/kernel/asm-offsets.c
Original file line number Diff line number Diff line change
Expand Up @@ -56,6 +56,9 @@ int main(void)
/* offsets into the thread struct */
DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
DEFINE(THREAD_SR, offsetof(struct thread_struct, seqstat));
DEFINE(PT_SR, offsetof(struct thread_struct, seqstat));
DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
DEFINE(THREAD_PC, offsetof(struct thread_struct, pc));
DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE);

Expand Down
2 changes: 1 addition & 1 deletion trunk/arch/blackfin/kernel/fixed_code.S
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
/*
* This file contains sequences of code that will be copied to a
* fixed location, defined in <asm/fixed_code.h>. The interrupt
* fixed location, defined in <asm/atomic_seq.h>. The interrupt
* handlers ensure that these sequences appear to be atomic when
* executed from userspace.
* These are aligned to 16 bytes, so that we have some space to replace
Expand Down
37 changes: 15 additions & 22 deletions trunk/arch/blackfin/kernel/module.c
Original file line number Diff line number Diff line change
Expand Up @@ -160,22 +160,15 @@ int
module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
char *secstrings, struct module *mod)
{
/*
* XXX: sechdrs are vmalloced in kernel/module.c
* and would be vfreed just after module is loaded,
* so we hack to keep the only information we needed
* in mod->arch to correctly free L1 I/D sram later.
* NOTE: this breaks the semantic of mod->arch structure.
*/
Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum;
void *dest = NULL;

for (s = sechdrs; s < sechdrs_end; ++s) {
if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) ||
((strcmp(".text", secstrings + s->sh_name) == 0) &&
(hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) {
mod->arch.text_l1 = s;
dest = l1_inst_sram_alloc(s->sh_size);
mod->arch.text_l1 = dest;
if (dest == NULL) {
printk(KERN_ERR
"module %s: L1 instruction memory allocation failed\n",
Expand All @@ -189,8 +182,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) ||
((strcmp(".data", secstrings + s->sh_name) == 0) &&
(hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
mod->arch.data_a_l1 = s;
dest = l1_data_sram_alloc(s->sh_size);
mod->arch.data_a_l1 = dest;
if (dest == NULL) {
printk(KERN_ERR
"module %s: L1 data memory allocation failed\n",
Expand All @@ -204,8 +197,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 ||
((strcmp(".bss", secstrings + s->sh_name) == 0) &&
(hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
mod->arch.bss_a_l1 = s;
dest = l1_data_sram_alloc(s->sh_size);
mod->arch.bss_a_l1 = dest;
if (dest == NULL) {
printk(KERN_ERR
"module %s: L1 data memory allocation failed\n",
Expand All @@ -217,8 +210,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
s->sh_addr = (unsigned long)dest;
}
if (strcmp(".l1.data.B", secstrings + s->sh_name) == 0) {
mod->arch.data_b_l1 = s;
dest = l1_data_B_sram_alloc(s->sh_size);
mod->arch.data_b_l1 = dest;
if (dest == NULL) {
printk(KERN_ERR
"module %s: L1 data memory allocation failed\n",
Expand All @@ -230,8 +223,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
s->sh_addr = (unsigned long)dest;
}
if (strcmp(".l1.bss.B", secstrings + s->sh_name) == 0) {
mod->arch.bss_b_l1 = s;
dest = l1_data_B_sram_alloc(s->sh_size);
mod->arch.bss_b_l1 = dest;
if (dest == NULL) {
printk(KERN_ERR
"module %s: L1 data memory allocation failed\n",
Expand Down Expand Up @@ -423,14 +416,14 @@ module_finalize(const Elf_Ehdr * hdr,

void module_arch_cleanup(struct module *mod)
{
if (mod->arch.text_l1)
l1_inst_sram_free((void *)mod->arch.text_l1);
if (mod->arch.data_a_l1)
l1_data_sram_free((void *)mod->arch.data_a_l1);
if (mod->arch.bss_a_l1)
l1_data_sram_free((void *)mod->arch.bss_a_l1);
if (mod->arch.data_b_l1)
l1_data_B_sram_free((void *)mod->arch.data_b_l1);
if (mod->arch.bss_b_l1)
l1_data_B_sram_free((void *)mod->arch.bss_b_l1);
if ((mod->arch.text_l1) && (mod->arch.text_l1->sh_addr))
l1_inst_sram_free((void *)mod->arch.text_l1->sh_addr);
if ((mod->arch.data_a_l1) && (mod->arch.data_a_l1->sh_addr))
l1_data_sram_free((void *)mod->arch.data_a_l1->sh_addr);
if ((mod->arch.bss_a_l1) && (mod->arch.bss_a_l1->sh_addr))
l1_data_sram_free((void *)mod->arch.bss_a_l1->sh_addr);
if ((mod->arch.data_b_l1) && (mod->arch.data_b_l1->sh_addr))
l1_data_B_sram_free((void *)mod->arch.data_b_l1->sh_addr);
if ((mod->arch.bss_b_l1) && (mod->arch.bss_b_l1->sh_addr))
l1_data_B_sram_free((void *)mod->arch.bss_b_l1->sh_addr);
}
2 changes: 1 addition & 1 deletion trunk/arch/blackfin/kernel/process.c
Original file line number Diff line number Diff line change
Expand Up @@ -245,7 +245,7 @@ unsigned long get_wchan(struct task_struct *p)

void finish_atomic_sections (struct pt_regs *regs)
{
int __user *up0 = (int __user *)regs->p0;
int __user *up0 = (int __user *)&regs->p0;

if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END)
return;
Expand Down
4 changes: 2 additions & 2 deletions trunk/arch/blackfin/kernel/ptrace.c
Original file line number Diff line number Diff line change
Expand Up @@ -185,8 +185,8 @@ void ptrace_disable(struct task_struct *child)
{
unsigned long tmp;
/* make sure the single step bit is not set. */
tmp = get_reg(child, PT_SYSCFG) & ~TRACE_BITS;
put_reg(child, PT_SYSCFG, tmp);
tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16);
put_reg(child, PT_SR, tmp);
}

long arch_ptrace(struct task_struct *child, long request, long addr, long data)
Expand Down
13 changes: 0 additions & 13 deletions trunk/arch/blackfin/kernel/signal.c
Original file line number Diff line number Diff line change
Expand Up @@ -42,9 +42,6 @@

#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))

/* Location of the trace bit in SYSCFG. */
#define TRACE_BITS 0x0001

struct fdpic_func_descriptor {
unsigned long text;
unsigned long GOT;
Expand Down Expand Up @@ -228,16 +225,6 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t * info,
regs->r1 = (unsigned long)(&frame->info);
regs->r2 = (unsigned long)(&frame->uc);

/*
* Clear the trace flag when entering the signal handler, but
* notify any tracer that was single-stepping it. The tracer
* may want to single-step inside the handler too.
*/
if (regs->syscfg & TRACE_BITS) {
regs->syscfg &= ~TRACE_BITS;
ptrace_notify(SIGTRAP);
}

return 0;

give_sigsegv:
Expand Down
10 changes: 3 additions & 7 deletions trunk/arch/blackfin/kernel/time-ts.c
Original file line number Diff line number Diff line change
Expand Up @@ -60,7 +60,7 @@ static inline unsigned long long cycles_2_ns(cycle_t cyc)

static cycle_t read_cycles(void)
{
return __bfin_cycles_off + (get_cycles() << __bfin_cycles_mod);
return get_cycles();
}

unsigned long long sched_clock(void)
Expand Down Expand Up @@ -117,7 +117,7 @@ static void bfin_timer_set_mode(enum clock_event_mode mode,
break;
}
case CLOCK_EVT_MODE_ONESHOT:
bfin_write_TSCALE(TIME_SCALE - 1);
bfin_write_TSCALE(0);
bfin_write_TCOUNT(0);
bfin_write_TCNTL(TMPWR | TMREN);
CSYNC();
Expand Down Expand Up @@ -183,14 +183,10 @@ irqreturn_t timer_interrupt(int irq, void *dev_id)

static int __init bfin_clockevent_init(void)
{
unsigned long timer_clk;

timer_clk = get_cclk() / TIME_SCALE;

setup_irq(IRQ_CORETMR, &bfin_timer_irq);
bfin_timer_init();

clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift);
clockevent_bfin.mult = div_sc(get_cclk(), NSEC_PER_SEC, clockevent_bfin.shift);
clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin);
clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin);
clockevents_register_device(&clockevent_bfin);
Expand Down
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