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yaml
---
r: 27128
b: refs/heads/master
c: 6ebba0e
h: refs/heads/master
v: v3
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Sergei Shtylyov authored and Ralf Baechle committed Jun 5, 2006
1 parent 22b087d commit 1943b44
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Showing 2 changed files with 15 additions and 3 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 79e0bc37255a4b934291b4d3ea5a4561fbd78da4
refs/heads/master: 6ebba0e2f56ee77270a9ef8e92c1b4ec38e5f419
16 changes: 14 additions & 2 deletions trunk/include/asm-mips/pgtable-32.h
Original file line number Diff line number Diff line change
Expand Up @@ -191,10 +191,17 @@ pfn_pte(unsigned long pfn, pgprot_t prot)
#else

/* Swap entries must have VALID and GLOBAL bits cleared. */
#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
#define __swp_type(x) (((x).val >> 2) & 0x1f)
#define __swp_offset(x) ((x).val >> 7)
#define __swp_entry(type,offset) \
((swp_entry_t) { ((type) << 2) | ((offset) << 7) })
#else
#define __swp_type(x) (((x).val >> 8) & 0x1f)
#define __swp_offset(x) ((x).val >> 13)
#define __swp_offset(x) ((x).val >> 13)
#define __swp_entry(type,offset) \
((swp_entry_t) { ((type) << 8) | ((offset) << 13) })
((swp_entry_t) { ((type) << 8) | ((offset) << 13) })
#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) */

/*
* Bits 0, 1, 2, 7 and 8 are taken, split up the 27 bits of offset
Expand All @@ -218,7 +225,12 @@ pfn_pte(unsigned long pfn, pgprot_t prot)

#endif

#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
#define __pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte_high })
#define __swp_entry_to_pte(x) ((pte_t) { 0, (x).val })
#else
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
#endif

#endif /* _ASM_PGTABLE_32_H */

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