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[PATCH] x86_64: prefetchw() can fall back to prefetch() if !3DNOW
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This is a multi-part message in MIME format.  If the cpu lacks 3DNOW
feature, we can use a normal prefetcht0 instruction instead of NOP5.
"prefetchw (%rxx)" and "prefetcht0 (%rxx)" have the same length, ranging
from 3 to 5 bytes depending on the register.  So this patch even helps
AMD64, shortening the length of the code.

Signed-off-by: Eric Dumazet <dada1@cosmosbay.com>
Acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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Eric Dumazet authored and Linus Torvalds committed Sep 7, 2005
1 parent c078d32 commit 19aaabb
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion include/asm-x86_64/processor.h
Original file line number Diff line number Diff line change
Expand Up @@ -398,7 +398,7 @@ static inline void prefetch(void *x)
#define ARCH_HAS_PREFETCHW 1
static inline void prefetchw(void *x)
{
alternative_input(ASM_NOP5,
alternative_input("prefetcht0 (%1)",
"prefetchw (%1)",
X86_FEATURE_3DNOW,
"r" (x));
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