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---
r: 54360
b: refs/heads/master
c: cd6c7ea
h: refs/heads/master
v: v3
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Paul Mundt authored and Paul Mundt committed May 7, 2007
1 parent e0d57b6 commit 19f091a
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Showing 3 changed files with 13 additions and 10 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 0264f1603904dbee3196abc748a53fb0b23b8046
refs/heads/master: cd6c7ea234dc8a8607283e056d8010b2bd3c6369
6 changes: 6 additions & 0 deletions trunk/arch/sh/drivers/pci/ops-sh4.c
Original file line number Diff line number Diff line change
Expand Up @@ -162,3 +162,9 @@ char * __init pcibios_setup(char *str)

return str;
}

int __attribute__((weak)) pci_fixup_pcic(void)
{
/* Nothing to do. */
return 0;
}
15 changes: 6 additions & 9 deletions trunk/arch/sh/drivers/pci/pci-sh7751.c
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,6 @@
* License. See linux/COPYING for more information.
*
*/

#undef DEBUG

#include <linux/init.h>
Expand All @@ -28,7 +27,7 @@
* Initialization. Try all known PCI access methods. Note that we support
* using both PCI BIOS and direct access: in such cases, we use I/O ports
* to access config space.
*
*
* Note that the platform specific initialization (BSC registers, and memory
* space mapping) will be called via the platform defined function
* pcibios_init_platform().
Expand Down Expand Up @@ -115,18 +114,18 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
* Wait Cycle Control + Parity Enable + Bus Master +
* Mem space enable
*/
word = SH7751_PCICONF1_WCC | SH7751_PCICONF1_PER |
word = SH7751_PCICONF1_WCC | SH7751_PCICONF1_PER |
SH7751_PCICONF1_BUM | SH7751_PCICONF1_MES;
pci_write_reg(word, SH7751_PCICONF1);

/* define this host as the host bridge */
word = PCI_BASE_CLASS_BRIDGE << 24;
pci_write_reg(word, SH7751_PCICONF2);

/* Set IO and Mem windows to local address
* Make PCI and local address the same for easy 1 to 1 mapping
/* Set IO and Mem windows to local address
* Make PCI and local address the same for easy 1 to 1 mapping
* Window0 = map->window0.size @ non-cached area base = SDRAM
* Window1 = map->window1.size @ cached area base = SDRAM
* Window1 = map->window1.size @ cached area base = SDRAM
*/
word = map->window0.size - 1;
pci_write_reg(word, SH4_PCILSR0);
Expand Down Expand Up @@ -175,7 +174,7 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
case SH7751_CS5_BASE_ADDR: word = __area_sdram_check(5); break;
case SH7751_CS6_BASE_ADDR: word = __area_sdram_check(6); break;
}

if (!word)
return 0;

Expand All @@ -194,9 +193,7 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
* DMA interrupts...
*/

#if defined(CONFIG_SH_RTS7751R2D) || defined(CONFIG_SH_LBOX_RE2)
pci_fixup_pcic();
#endif

/* SH7751 init done, set central function init complete */
/* use round robin mode to stop a device starving/overruning */
Expand Down

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