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yaml --- r: 353787 b: refs/heads/master c: 9f1c824 h: refs/heads/master i: 353785: 99b573b 353783: dd41996 v: v3
git-mirror · Jan 7, 2013 · 19f3cb9 · 19f3cb9
1 parent ab5056a
commit 19f3cb9
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Showing 2 changed files with 49 additions and 69 deletions.
diff --git a/[refs] b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: f91d7665f8ed34b1c798ab1fe419a25573bb65bf
+refs/heads/master: 9f1c824ed01dd54fb14ea8542b60b79bc1c2d043
diff --git a/trunk/drivers/staging/bcm/target_params.h b/trunk/drivers/staging/bcm/target_params.h
@@ -3,79 +3,59 @@
 
 typedef struct _TARGET_PARAMS
 {
-      B_UINT32 m_u32CfgVersion;
-
-      // Scanning Related Params
-      B_UINT32 m_u32CenterFrequency;
-      B_UINT32 m_u32BandAScan;
-      B_UINT32 m_u32BandBScan;
-      B_UINT32 m_u32BandCScan;
-
-
-      // QoS Params
-      B_UINT32 m_u32ErtpsOptions;
-
-      B_UINT32 m_u32PHSEnable;
-
-
-      // HO Params
-      B_UINT32 m_u32HoEnable;
-
-      B_UINT32 m_u32HoReserved1;
-      B_UINT32 m_u32HoReserved2;
-      // Power Control Params
-
-      B_UINT32 m_u32MimoEnable;
-
-      B_UINT32 m_u32SecurityEnable;
-
-      B_UINT32 m_u32PowerSavingModesEnable; //bit 1: 1 Idlemode enable; bit2: 1 Sleepmode Enable
-	  /* PowerSaving Mode Options:
-	     bit 0 = 1: CPE mode - to keep pcmcia if alive;
-	     bit 1 = 1: CINR reporting in Idlemode Msg
-	     bit 2 = 1: Default PSC Enable in sleepmode*/
-      B_UINT32 m_u32PowerSavingModeOptions;
-
-      B_UINT32 m_u32ArqEnable;
-
-      // From Version #3, the HARQ section renamed as general
-      B_UINT32 m_u32HarqEnable;
-       // EEPROM Param Location
-       B_UINT32  m_u32EEPROMFlag;
-       // BINARY TYPE - 4th MSByte: Interface Type -  3rd MSByte: Vendor Type - 2nd MSByte
-       // Unused - LSByte
-      B_UINT32   m_u32Customize;
-      B_UINT32   m_u32ConfigBW;  /* In Hz */
-      B_UINT32   m_u32ShutDownInitThresholdTimer;
-
-      B_UINT32  m_u32RadioParameter;
-      B_UINT32  m_u32PhyParameter1;
-      B_UINT32  m_u32PhyParameter2;
-      B_UINT32  m_u32PhyParameter3;
-
-      B_UINT32	  m_u32TestOptions; // in eval mode only; lower 16bits = basic cid for testing; then bit 16 is test cqich,bit 17  test init rang; bit 18 test periodic rang and bit 19 is test harq ack/nack
-
+	B_UINT32 m_u32CfgVersion;
+	// Scanning Related Params
+	B_UINT32 m_u32CenterFrequency;
+	B_UINT32 m_u32BandAScan;
+	B_UINT32 m_u32BandBScan;
+	B_UINT32 m_u32BandCScan;
+	// QoS Params
+	B_UINT32 m_u32ErtpsOptions;
+	B_UINT32 m_u32PHSEnable;
+	// HO Params
+	B_UINT32 m_u32HoEnable;
+	B_UINT32 m_u32HoReserved1;
+	B_UINT32 m_u32HoReserved2;
+	// Power Control Params
+	B_UINT32 m_u32MimoEnable;
+	B_UINT32 m_u32SecurityEnable;
+	B_UINT32 m_u32PowerSavingModesEnable; //bit 1: 1 Idlemode enable; bit2: 1 Sleepmode Enable
+	/* PowerSaving Mode Options:
+	   bit 0 = 1: CPE mode - to keep pcmcia if alive;
+	   bit 1 = 1: CINR reporting in Idlemode Msg
+	   bit 2 = 1: Default PSC Enable in sleepmode*/
+	B_UINT32 m_u32PowerSavingModeOptions;
+	B_UINT32 m_u32ArqEnable;
+	// From Version #3, the HARQ section renamed as general
+	B_UINT32 m_u32HarqEnable;
+	// EEPROM Param Location
+	B_UINT32  m_u32EEPROMFlag;
+	// BINARY TYPE - 4th MSByte: Interface Type -  3rd MSByte: Vendor Type - 2nd MSByte
+	// Unused - LSByte
+	B_UINT32 m_u32Customize;
+	B_UINT32 m_u32ConfigBW;  /* In Hz */
+	B_UINT32 m_u32ShutDownInitThresholdTimer;
+	B_UINT32 m_u32RadioParameter;
+	B_UINT32 m_u32PhyParameter1;
+	B_UINT32 m_u32PhyParameter2;
+	B_UINT32 m_u32PhyParameter3;
+	B_UINT32 m_u32TestOptions; // in eval mode only; lower 16bits = basic cid for testing; then bit 16 is test cqich,bit 17  test init rang; bit 18 test periodic rang and bit 19 is test harq ack/nack
 	B_UINT32 m_u32MaxMACDataperDLFrame;
 	B_UINT32 m_u32MaxMACDataperULFrame;
-
 	B_UINT32 m_u32Corr2MacFlags;
-
-    //adding driver params.
+	//adding driver params.
 	B_UINT32 HostDrvrConfig1;
-    B_UINT32 HostDrvrConfig2;
-    B_UINT32 HostDrvrConfig3;
-    B_UINT32 HostDrvrConfig4;
-    B_UINT32 HostDrvrConfig5;
-    B_UINT32 HostDrvrConfig6;
-    B_UINT32 m_u32SegmentedPUSCenable;
-
+	B_UINT32 HostDrvrConfig2;
+	B_UINT32 HostDrvrConfig3;
+	B_UINT32 HostDrvrConfig4;
+	B_UINT32 HostDrvrConfig5;
+	B_UINT32 HostDrvrConfig6;
+	B_UINT32 m_u32SegmentedPUSCenable;
 	// removed SHUT down related 'unused' params from here to sync 4.x and 5.x CFG files..
-
-    //BAMC Related Parameters
-    //Bit 0-15 Band AMC signaling configuration: Bit 1 = 1  Enable Band AMC signaling.
-    //bit 16-31 Band AMC Data configuration: Bit 16 = 1  Band AMC 2x3 support.
+	//BAMC Related Parameters
+	//Bit 0-15 Band AMC signaling configuration: Bit 1 = 1  Enable Band AMC signaling.
+	//bit 16-31 Band AMC Data configuration: Bit 16 = 1  Band AMC 2x3 support.
 	B_UINT32 m_u32BandAMCEnable;
-
-} stTargetParams,TARGET_PARAMS,*PTARGET_PARAMS, STARGETPARAMS, *PSTARGETPARAMS;
+} stTargetParams, TARGET_PARAMS, *PTARGET_PARAMS, STARGETPARAMS, *PSTARGETPARAMS;
 
 #endif