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yaml
---
r: 307147
b: refs/heads/master
c: e367031
h: refs/heads/master
i:
  307145: 0e26fe3
  307143: b39ac70
v: v3
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Daniel Vetter committed Apr 13, 2012
1 parent ff5fa05 commit 1a2c981
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Showing 2 changed files with 25 additions and 54 deletions.
2 changes: 1 addition & 1 deletion [refs]
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Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 686cb5f9f5dc7db150c9f4e49cc0d45ef952450b
refs/heads/master: e367031966c3546b213f6699b83669739cb6fb1d
77 changes: 24 additions & 53 deletions trunk/drivers/gpu/drm/i915/intel_ringbuffer.c
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Original file line number Diff line number Diff line change
Expand Up @@ -645,7 +645,7 @@ i915_disable_irq(drm_i915_private_t *dev_priv, u32 mask)
}

static bool
render_ring_get_irq(struct intel_ring_buffer *ring)
i9xx_ring_get_irq(struct intel_ring_buffer *ring)
{
struct drm_device *dev = ring->dev;
drm_i915_private_t *dev_priv = dev->dev_private;
Expand All @@ -657,17 +657,17 @@ render_ring_get_irq(struct intel_ring_buffer *ring)
if (ring->irq_refcount++ == 0) {
if (INTEL_INFO(dev)->gen >= 5)
ironlake_enable_irq(dev_priv,
GT_PIPE_NOTIFY | GT_USER_INTERRUPT);
ring->irq_enable_mask);
else
i915_enable_irq(dev_priv, I915_USER_INTERRUPT);
i915_enable_irq(dev_priv, ring->irq_enable_mask);
}
spin_unlock(&ring->irq_lock);

return true;
}

static void
render_ring_put_irq(struct intel_ring_buffer *ring)
i9xx_ring_put_irq(struct intel_ring_buffer *ring)
{
struct drm_device *dev = ring->dev;
drm_i915_private_t *dev_priv = dev->dev_private;
Expand All @@ -676,10 +676,9 @@ render_ring_put_irq(struct intel_ring_buffer *ring)
if (--ring->irq_refcount == 0) {
if (INTEL_INFO(dev)->gen >= 5)
ironlake_disable_irq(dev_priv,
GT_USER_INTERRUPT |
GT_PIPE_NOTIFY);
ring->irq_enable_mask);
else
i915_disable_irq(dev_priv, I915_USER_INTERRUPT);
i915_disable_irq(dev_priv, ring->irq_enable_mask);
}
spin_unlock(&ring->irq_lock);
}
Expand Down Expand Up @@ -795,42 +794,6 @@ gen6_ring_put_irq(struct intel_ring_buffer *ring)
gen6_gt_force_wake_put(dev_priv);
}

static bool
bsd_ring_get_irq(struct intel_ring_buffer *ring)
{
struct drm_device *dev = ring->dev;
drm_i915_private_t *dev_priv = dev->dev_private;

if (!dev->irq_enabled)
return false;

spin_lock(&ring->irq_lock);
if (ring->irq_refcount++ == 0) {
if (IS_G4X(dev))
i915_enable_irq(dev_priv, I915_BSD_USER_INTERRUPT);
else
ironlake_enable_irq(dev_priv, GT_BSD_USER_INTERRUPT);
}
spin_unlock(&ring->irq_lock);

return true;
}
static void
bsd_ring_put_irq(struct intel_ring_buffer *ring)
{
struct drm_device *dev = ring->dev;
drm_i915_private_t *dev_priv = dev->dev_private;

spin_lock(&ring->irq_lock);
if (--ring->irq_refcount == 0) {
if (IS_G4X(dev))
i915_disable_irq(dev_priv, I915_BSD_USER_INTERRUPT);
else
ironlake_disable_irq(dev_priv, GT_BSD_USER_INTERRUPT);
}
spin_unlock(&ring->irq_lock);
}

static int
ring_dispatch_execbuffer(struct intel_ring_buffer *ring, u32 offset, u32 length)
{
Expand Down Expand Up @@ -1338,14 +1301,16 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
ring->add_request = pc_render_add_request;
ring->flush = render_ring_flush;
ring->get_seqno = pc_render_get_seqno;
ring->irq_get = render_ring_get_irq;
ring->irq_put = render_ring_put_irq;
ring->irq_get = i9xx_ring_get_irq;
ring->irq_put = i9xx_ring_put_irq;
ring->irq_enable_mask = GT_USER_INTERRUPT | GT_PIPE_NOTIFY;
} else {
ring->add_request = render_ring_add_request;
ring->flush = render_ring_flush;
ring->get_seqno = ring_get_seqno;
ring->irq_get = render_ring_get_irq;
ring->irq_put = render_ring_put_irq;
ring->irq_get = i9xx_ring_get_irq;
ring->irq_put = i9xx_ring_put_irq;
ring->irq_enable_mask = I915_USER_INTERRUPT;
}
ring->write_tail = ring_write_tail;
ring->dispatch_execbuffer = render_ring_dispatch_execbuffer;
Expand Down Expand Up @@ -1377,14 +1342,16 @@ int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size)
ring->add_request = pc_render_add_request;
ring->flush = render_ring_flush;
ring->get_seqno = pc_render_get_seqno;
ring->irq_get = render_ring_get_irq;
ring->irq_put = render_ring_put_irq;
ring->irq_get = i9xx_ring_get_irq;
ring->irq_put = i9xx_ring_put_irq;
ring->irq_enable_mask = GT_USER_INTERRUPT | GT_PIPE_NOTIFY;
} else {
ring->add_request = render_ring_add_request;
ring->flush = render_ring_flush;
ring->get_seqno = ring_get_seqno;
ring->irq_get = render_ring_get_irq;
ring->irq_put = render_ring_put_irq;
ring->irq_get = i9xx_ring_get_irq;
ring->irq_put = i9xx_ring_put_irq;
ring->irq_enable_mask = I915_USER_INTERRUPT;
}
ring->write_tail = ring_write_tail;
ring->dispatch_execbuffer = render_ring_dispatch_execbuffer;
Expand Down Expand Up @@ -1451,8 +1418,12 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
ring->flush = bsd_ring_flush;
ring->add_request = ring_add_request;
ring->get_seqno = ring_get_seqno;
ring->irq_get = bsd_ring_get_irq;
ring->irq_put = bsd_ring_put_irq;
ring->irq_get = i9xx_ring_get_irq;
ring->irq_put = i9xx_ring_put_irq;
if (IS_GEN5(dev))
ring->irq_enable_mask = GT_BSD_USER_INTERRUPT;
else
ring->irq_enable_mask = I915_BSD_USER_INTERRUPT;
ring->dispatch_execbuffer = ring_dispatch_execbuffer;
}
ring->init = init_ring_common;
Expand Down

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