---

yaml
---
r: 307519
b: refs/heads/master
c: 2b20fd0
h: refs/heads/master
i:
  307517: ac267e7
  307515: 557fbc2
  307511: 2c4554f
  307503: 321dd0c
  307487: 350138b
  307455: a04b7ef
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 5f54d29ee9dace1e2ef4e8c9873ad4dd7a06d11a
+refs/heads/master: 2b20fd0ab497df5284743975e4204c1c2b03a397

trunk/drivers/gpu/drm/nouveau/nva3_pm.c

@@ -456,6 +456,9 @@ mclk_timing_set(struct nouveau_mem_exec_func *exec)
 		if (info->ramcfg[2] & 0x02)
 			unk718 |= 0x00000100;
 		nv_wr32(dev, 0x100718, unk718);
+
+		if (info->ramcfg[2] & 0x10)
+			nv_wr32(dev, 0x111100, 0x48000000); /*XXX*/
 	}
 }
 
@@ -498,15 +501,33 @@ prog_mem(struct drm_device *dev, struct nva3_pm_state *info)
 		nv_mask(dev, 0x004168, 0x003f3141, ctrl);
 	}
 
+	if (info->ramcfg) {
+		if (info->ramcfg[2] & 0x10) {
+			nv_mask(dev, 0x111104, 0x00000600, 0x00000000);
+		} else {
+			nv_mask(dev, 0x111100, 0x40000000, 0x40000000);
+			nv_mask(dev, 0x111104, 0x00000180, 0x00000000);
+		}
+	}
 	if (info->rammap && !(info->rammap[4] & 0x02))
 		nv_mask(dev, 0x100200, 0x00000800, 0x00000000);
 	nv_wr32(dev, 0x611200, 0x00003300);
+	if (!(info->ramcfg[2] & 0x10))
+		nv_wr32(dev, 0x111100, 0x4c020000); /*XXX*/
 
 	nouveau_mem_exec(&exec, info->perflvl);
 
 	nv_wr32(dev, 0x611200, 0x00003330);
 	if (info->rammap && (info->rammap[4] & 0x02))
 		nv_mask(dev, 0x100200, 0x00000800, 0x00000800);
+	if (info->ramcfg) {
+		if (info->ramcfg[2] & 0x10) {
+			nv_mask(dev, 0x111104, 0x00000180, 0x00000180);
+			nv_mask(dev, 0x111100, 0x40000000, 0x00000000);
+		} else {
+			nv_mask(dev, 0x111104, 0x00000600, 0x00000600);
+		}
+	}
 
 	if (info->mclk.pll) {
 		nv_mask(dev, 0x004168, 0x00000001, 0x00000000);