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ARM: 8309/1: l2c: enforce use of cache-level property
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Make sure that we can read the "cache-level" property from the L2 cache
controller node, and ensure its value is 2.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Florian Fainelli authored and Russell King committed Mar 10, 2015
1 parent 5744ff4 commit 1b4bd60
Showing 1 changed file with 7 additions and 0 deletions.
7 changes: 7 additions & 0 deletions arch/arm/mm/cache-l2x0.c
Original file line number Diff line number Diff line change
Expand Up @@ -1648,6 +1648,7 @@ int __init l2x0_of_init(u32 aux_val, u32 aux_mask)
struct device_node *np;
struct resource res;
u32 cache_id, old_aux;
u32 cache_level = 2;

np = of_find_matching_node(NULL, l2x0_ids);
if (!np)
Expand Down Expand Up @@ -1680,6 +1681,12 @@ int __init l2x0_of_init(u32 aux_val, u32 aux_mask)
if (!of_property_read_bool(np, "cache-unified"))
pr_err("L2C: device tree omits to specify unified cache\n");

if (of_property_read_u32(np, "cache-level", &cache_level))
pr_err("L2C: device tree omits to specify cache-level\n");

if (cache_level != 2)
pr_err("L2C: device tree specifies invalid cache level\n");

/* Read back current (default) hardware configuration */
if (data->save)
data->save(l2x0_base);
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