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[POWERPC] Remove gratuitous reads from maple PCI config space methods
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The maple PCI configuration space write methods read the written
location immediately after the write is performed, presumably in order
to flush the write.  However, configuration space writes are not
allowed to be posted, making these reads gratuitous.  Furthermore,
this behavior potentially causes us to violate the PCI PM spec when
changing between e.g. D0 and D3 states, because a delay of up to 10ms
may be required before the OS accesses configuration space after the
write which initiates the transition.  It definitely causes a system
hang for me with a Broadcom 5721 PCIE network adapter, which is fixed
by this change.

Therefore this removes the gratuitous reads from u3_agp_write_config,
u3_ht_write_config, and u4_pcie_write_config.

Signed-off-by: Nathan Lynch <ntl@pobox.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Nathan Lynch authored and Paul Mackerras committed Aug 17, 2007
1 parent 96b952d commit 1bdb286
Showing 1 changed file with 0 additions and 9 deletions.
9 changes: 0 additions & 9 deletions arch/powerpc/platforms/maple/pci.c
Original file line number Diff line number Diff line change
Expand Up @@ -169,15 +169,12 @@ static int u3_agp_write_config(struct pci_bus *bus, unsigned int devfn,
switch (len) {
case 1:
out_8(addr, val);
(void) in_8(addr);
break;
case 2:
out_le16(addr, val);
(void) in_le16(addr);
break;
default:
out_le32(addr, val);
(void) in_le32(addr);
break;
}
return PCIBIOS_SUCCESSFUL;
Expand Down Expand Up @@ -268,15 +265,12 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
switch (len) {
case 1:
out_8(addr, val);
(void) in_8(addr);
break;
case 2:
out_le16(addr, val);
(void) in_le16(addr);
break;
default:
out_le32(addr, val);
(void) in_le32(addr);
break;
}
return PCIBIOS_SUCCESSFUL;
Expand Down Expand Up @@ -376,15 +370,12 @@ static int u4_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
switch (len) {
case 1:
out_8(addr, val);
(void) in_8(addr);
break;
case 2:
out_le16(addr, val);
(void) in_le16(addr);
break;
default:
out_le32(addr, val);
(void) in_le32(addr);
break;
}
return PCIBIOS_SUCCESSFUL;
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