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Merge branch 'asm-generic-io' of https://github.com/thierryreding/linux
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… into asm-generic

Pull asm-generic/io.h overhaul from Thierry Reding

* 'asm-generic-io' of https://github.com/thierryreding/linux:
  arm64: Use include/asm-generic/io.h
  ARM: Use include/asm-generic/io.h
  asm-generic/io.h: Implement generic {read,write}s*()
  asm-generic/io.h: Reconcile I/O accessor overrides
  /dev/mem: Use more consistent data types
  Change xlate_dev_{kmem,mem}_ptr() prototypes
  ARM: ixp4xx: Properly override I/O accessors
  ARM: ixp4xx: Fix build with IXP4XX_INDIRECT_PCI
  ARM: ebsa110: Properly override I/O accessors
  ARC: Remove redundant PCI_IOBASE declaration

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann committed Nov 10, 2014
2 parents f114040 + 09a5723 commit 1d0eeac
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Showing 17 changed files with 730 additions and 321 deletions.
2 changes: 0 additions & 2 deletions arch/arc/include/asm/io.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,8 +13,6 @@
#include <asm/byteorder.h>
#include <asm/page.h>

#define PCI_IOBASE ((void __iomem *)0)

extern void __iomem *ioremap(unsigned long physaddr, unsigned long size);
extern void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,
unsigned long flags);
Expand Down
89 changes: 36 additions & 53 deletions arch/arm/include/asm/io.h
Original file line number Diff line number Diff line change
Expand Up @@ -47,13 +47,13 @@ extern void atomic_io_modify_relaxed(void __iomem *reg, u32 mask, u32 set);
* Generic IO read/write. These perform native-endian accesses. Note
* that some architectures will want to re-define __raw_{read,write}w.
*/
extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen);
extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
extern void __raw_writesl(void __iomem *addr, const void *data, int longlen);
void __raw_writesb(volatile void __iomem *addr, const void *data, int bytelen);
void __raw_writesw(volatile void __iomem *addr, const void *data, int wordlen);
void __raw_writesl(volatile void __iomem *addr, const void *data, int longlen);

extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen);
extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
void __raw_readsb(const volatile void __iomem *addr, void *data, int bytelen);
void __raw_readsw(const volatile void __iomem *addr, void *data, int wordlen);
void __raw_readsl(const volatile void __iomem *addr, void *data, int longlen);

#if __LINUX_ARM_ARCH__ < 6
/*
Expand All @@ -69,13 +69,15 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
* writeback addressing modes as these incur a significant performance
* overhead (the address generation must be emulated in software).
*/
#define __raw_writew __raw_writew
static inline void __raw_writew(u16 val, volatile void __iomem *addr)
{
asm volatile("strh %1, %0"
: "+Q" (*(volatile u16 __force *)addr)
: "r" (val));
}

#define __raw_readw __raw_readw
static inline u16 __raw_readw(const volatile void __iomem *addr)
{
u16 val;
Expand All @@ -86,20 +88,23 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
}
#endif

#define __raw_writeb __raw_writeb
static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
{
asm volatile("strb %1, %0"
: "+Qo" (*(volatile u8 __force *)addr)
: "r" (val));
}

#define __raw_writel __raw_writel
static inline void __raw_writel(u32 val, volatile void __iomem *addr)
{
asm volatile("str %1, %0"
: "+Qo" (*(volatile u32 __force *)addr)
: "r" (val));
}

#define __raw_readb __raw_readb
static inline u8 __raw_readb(const volatile void __iomem *addr)
{
u8 val;
Expand All @@ -109,6 +114,7 @@ static inline u8 __raw_readb(const volatile void __iomem *addr)
return val;
}

#define __raw_readl __raw_readl
static inline u32 __raw_readl(const volatile void __iomem *addr)
{
u32 val;
Expand Down Expand Up @@ -267,20 +273,6 @@ extern int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr);
#define insl(p,d,l) __raw_readsl(__io(p),d,l)
#endif

#define outb_p(val,port) outb((val),(port))
#define outw_p(val,port) outw((val),(port))
#define outl_p(val,port) outl((val),(port))
#define inb_p(port) inb((port))
#define inw_p(port) inw((port))
#define inl_p(port) inl((port))

#define outsb_p(port,from,len) outsb(port,from,len)
#define outsw_p(port,from,len) outsw(port,from,len)
#define outsl_p(port,from,len) outsl(port,from,len)
#define insb_p(port,to,len) insb(port,to,len)
#define insw_p(port,to,len) insw(port,to,len)
#define insl_p(port,to,len) insl(port,to,len)

/*
* String version of IO memory access ops:
*/
Expand Down Expand Up @@ -347,39 +339,41 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
#define iounmap __arm_iounmap

/*
* io{read,write}{8,16,32} macros
* io{read,write}{16,32}be() macros
*/
#ifndef ioread8
#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __iormb(); __v; })
#define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __iormb(); __v; })
#define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __iormb(); __v; })

#define ioread16be(p) ({ unsigned int __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
#define ioread32be(p) ({ unsigned int __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; })

#define iowrite8(v,p) ({ __iowmb(); __raw_writeb(v, p); })
#define iowrite16(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_le16(v), p); })
#define iowrite32(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_le32(v), p); })
#define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
#define ioread32be(p) ({ __u32 __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; })

#define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_be16(v), p); })
#define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); })

#define ioread8_rep(p,d,c) __raw_readsb(p,d,c)
#define ioread16_rep(p,d,c) __raw_readsw(p,d,c)
#define ioread32_rep(p,d,c) __raw_readsl(p,d,c)

#define iowrite8_rep(p,s,c) __raw_writesb(p,s,c)
#define iowrite16_rep(p,s,c) __raw_writesw(p,s,c)
#define iowrite32_rep(p,s,c) __raw_writesl(p,s,c)
#define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_be16(v), p); })
#define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); })

#ifndef ioport_map
#define ioport_map ioport_map
extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
#endif
#ifndef ioport_unmap
#define ioport_unmap ioport_unmap
extern void ioport_unmap(void __iomem *addr);
#endif

struct pci_dev;

#define pci_iounmap pci_iounmap
extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);

/*
* Convert a physical pointer to a virtual kernel pointer for /dev/mem
* access
*/
#define xlate_dev_mem_ptr(p) __va(p)

/*
* Convert a virtual cached pointer to an uncached pointer
*/
#define xlate_dev_kmem_ptr(p) p

#include <asm-generic/io.h>

/*
* can the hardware map this into one segment or not, given no other
* constraints.
Expand All @@ -401,17 +395,6 @@ extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
extern int devmem_is_allowed(unsigned long pfn);
#endif

/*
* Convert a physical pointer to a virtual kernel pointer for /dev/mem
* access
*/
#define xlate_dev_mem_ptr(p) __va(p)

/*
* Convert a virtual cached pointer to an uncached pointer
*/
#define xlate_dev_kmem_ptr(p) p

/*
* Register ISA memory and port locations for glibc iopl/inb/outb
* emulation.
Expand Down
4 changes: 4 additions & 0 deletions arch/arm/include/asm/memory.h
Original file line number Diff line number Diff line change
Expand Up @@ -274,11 +274,13 @@ static inline unsigned long __phys_to_virt(phys_addr_t x)
* translation for translating DMA addresses. Use the driver
* DMA support - see dma-mapping.h.
*/
#define virt_to_phys virt_to_phys
static inline phys_addr_t virt_to_phys(const volatile void *x)
{
return __virt_to_phys((unsigned long)(x));
}

#define phys_to_virt phys_to_virt
static inline void *phys_to_virt(phys_addr_t x)
{
return (void *)__phys_to_virt(x);
Expand Down Expand Up @@ -322,11 +324,13 @@ static inline phys_addr_t __virt_to_idmap(unsigned long x)
#endif

#ifdef CONFIG_VIRT_TO_BUS
#define virt_to_bus virt_to_bus
static inline __deprecated unsigned long virt_to_bus(void *x)
{
return __virt_to_bus((unsigned long)x);
}

#define bus_to_virt bus_to_virt
static inline __deprecated void *bus_to_virt(unsigned long x)
{
return (void *)__bus_to_virt(x);
Expand Down
25 changes: 18 additions & 7 deletions arch/arm/mach-ebsa110/include/mach/io.h
Original file line number Diff line number Diff line change
Expand Up @@ -29,9 +29,9 @@ u8 __readb(const volatile void __iomem *addr);
u16 __readw(const volatile void __iomem *addr);
u32 __readl(const volatile void __iomem *addr);

void __writeb(u8 val, void __iomem *addr);
void __writew(u16 val, void __iomem *addr);
void __writel(u32 val, void __iomem *addr);
void __writeb(u8 val, volatile void __iomem *addr);
void __writew(u16 val, volatile void __iomem *addr);
void __writel(u32 val, volatile void __iomem *addr);

/*
* Argh, someone forgot the IOCS16 line. We therefore have to handle
Expand Down Expand Up @@ -62,20 +62,31 @@ void __writel(u32 val, void __iomem *addr);
#define writew(v,b) __writew(v,b)
#define writel(v,b) __writel(v,b)

#define insb insb
extern void insb(unsigned int port, void *buf, int sz);
#define insw insw
extern void insw(unsigned int port, void *buf, int sz);
#define insl insl
extern void insl(unsigned int port, void *buf, int sz);

#define outsb outsb
extern void outsb(unsigned int port, const void *buf, int sz);
#define outsw outsw
extern void outsw(unsigned int port, const void *buf, int sz);
#define outsl outsl
extern void outsl(unsigned int port, const void *buf, int sz);

/* can't support writesb atm */
extern void writesw(void __iomem *addr, const void *data, int wordlen);
extern void writesl(void __iomem *addr, const void *data, int longlen);
#define writesw writesw
extern void writesw(volatile void __iomem *addr, const void *data, int wordlen);
#define writesl writesl
extern void writesl(volatile void __iomem *addr, const void *data, int longlen);

/* can't support readsb atm */
extern void readsw(const void __iomem *addr, void *data, int wordlen);
extern void readsl(const void __iomem *addr, void *data, int longlen);
#define readsw readsw
extern void readsw(const volatile void __iomem *addr, void *data, int wordlen);

#define readsl readsl
extern void readsl(const volatile void __iomem *addr, void *data, int longlen);

#endif
14 changes: 7 additions & 7 deletions arch/arm/mach-ebsa110/io.c
Original file line number Diff line number Diff line change
Expand Up @@ -102,7 +102,7 @@ EXPORT_SYMBOL(__readb);
EXPORT_SYMBOL(__readw);
EXPORT_SYMBOL(__readl);

void readsw(const void __iomem *addr, void *data, int len)
void readsw(const volatile void __iomem *addr, void *data, int len)
{
void __iomem *a = __isamem_convert_addr(addr);

Expand All @@ -112,7 +112,7 @@ void readsw(const void __iomem *addr, void *data, int len)
}
EXPORT_SYMBOL(readsw);

void readsl(const void __iomem *addr, void *data, int len)
void readsl(const volatile void __iomem *addr, void *data, int len)
{
void __iomem *a = __isamem_convert_addr(addr);

Expand All @@ -122,7 +122,7 @@ void readsl(const void __iomem *addr, void *data, int len)
}
EXPORT_SYMBOL(readsl);

void __writeb(u8 val, void __iomem *addr)
void __writeb(u8 val, volatile void __iomem *addr)
{
void __iomem *a = __isamem_convert_addr(addr);

Expand All @@ -132,7 +132,7 @@ void __writeb(u8 val, void __iomem *addr)
__raw_writeb(val, a);
}

void __writew(u16 val, void __iomem *addr)
void __writew(u16 val, volatile void __iomem *addr)
{
void __iomem *a = __isamem_convert_addr(addr);

Expand All @@ -142,7 +142,7 @@ void __writew(u16 val, void __iomem *addr)
__raw_writew(val, a);
}

void __writel(u32 val, void __iomem *addr)
void __writel(u32 val, volatile void __iomem *addr)
{
void __iomem *a = __isamem_convert_addr(addr);

Expand All @@ -157,7 +157,7 @@ EXPORT_SYMBOL(__writeb);
EXPORT_SYMBOL(__writew);
EXPORT_SYMBOL(__writel);

void writesw(void __iomem *addr, const void *data, int len)
void writesw(volatile void __iomem *addr, const void *data, int len)
{
void __iomem *a = __isamem_convert_addr(addr);

Expand All @@ -167,7 +167,7 @@ void writesw(void __iomem *addr, const void *data, int len)
}
EXPORT_SYMBOL(writesw);

void writesl(void __iomem *addr, const void *data, int len)
void writesl(volatile void __iomem *addr, const void *data, int len)
{
void __iomem *a = __isamem_convert_addr(addr);

Expand Down
2 changes: 1 addition & 1 deletion arch/arm/mach-ixp4xx/common.c
Original file line number Diff line number Diff line change
Expand Up @@ -652,7 +652,7 @@ static void __iomem *ixp4xx_ioremap_caller(phys_addr_t addr, size_t size,
return (void __iomem *)addr;
}

static void ixp4xx_iounmap(void __iomem *addr)
static void ixp4xx_iounmap(volatile void __iomem *addr)
{
if (!is_pci_memory((__force u32)addr))
__iounmap(addr);
Expand Down
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