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arch/tile: don't allow user code to set the PL via ptrace or signal r…
…eturn The kernel was allowing any component of the pt_regs to be updated either by signal handlers writing to the stack, or by processes writing via PTRACE_POKEUSR or PTRACE_SETREGS, which meant they could set their PL up from 0 to 1 and get access to kernel code and data (or, in practice, cause a kernel panic). We now always reset the ex1 field, allowing the user to set their ICS bit only. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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Chris Metcalf
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Nov 1, 2010
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