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yaml
---
r: 41770
b: refs/heads/master
c: 234754d
h: refs/heads/master
v: v3
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Michael Chan authored and David S. Miller committed Dec 3, 2006
1 parent 077259d commit 1e61a19
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Showing 2 changed files with 38 additions and 25 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 59b47d8ad35b9858d63d6fd3db76e698e4a98f36
refs/heads/master: 234754d5c1ef25bbc64631a420ba66eeb2904633
61 changes: 37 additions & 24 deletions trunk/drivers/net/bnx2.c
Original file line number Diff line number Diff line change
Expand Up @@ -3247,31 +3247,44 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
* before we issue a reset. */
val = REG_RD(bp, BNX2_MISC_ID);

val = BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ |
BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |
BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP;
if (CHIP_NUM(bp) == CHIP_NUM_5709) {
REG_WR(bp, BNX2_MISC_COMMAND, BNX2_MISC_COMMAND_SW_RESET);
REG_RD(bp, BNX2_MISC_COMMAND);
udelay(5);

/* Chip reset. */
REG_WR(bp, BNX2_PCICFG_MISC_CONFIG, val);
val = BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |
BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP;

if ((CHIP_ID(bp) == CHIP_ID_5706_A0) ||
(CHIP_ID(bp) == CHIP_ID_5706_A1))
msleep(15);
pci_write_config_dword(bp->pdev, BNX2_PCICFG_MISC_CONFIG, val);

/* Reset takes approximate 30 usec */
for (i = 0; i < 10; i++) {
val = REG_RD(bp, BNX2_PCICFG_MISC_CONFIG);
if ((val & (BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ |
BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY)) == 0) {
break;
} else {
val = BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ |
BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |
BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP;

/* Chip reset. */
REG_WR(bp, BNX2_PCICFG_MISC_CONFIG, val);

if ((CHIP_ID(bp) == CHIP_ID_5706_A0) ||
(CHIP_ID(bp) == CHIP_ID_5706_A1)) {
current->state = TASK_UNINTERRUPTIBLE;
schedule_timeout(HZ / 50);
}
udelay(10);
}

if (val & (BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ |
BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY)) {
printk(KERN_ERR PFX "Chip reset did not complete\n");
return -EBUSY;
/* Reset takes approximate 30 usec */
for (i = 0; i < 10; i++) {
val = REG_RD(bp, BNX2_PCICFG_MISC_CONFIG);
if ((val & (BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ |
BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY)) == 0)
break;
udelay(10);
}

if (val & (BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ |
BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY)) {
printk(KERN_ERR PFX "Chip reset did not complete\n");
return -EBUSY;
}
}

/* Make sure byte swapping is properly configured. */
Expand Down Expand Up @@ -3976,8 +3989,8 @@ bnx2_run_loopback(struct bnx2 *bp, int loopback_mode)
bp->tx_prod = NEXT_TX_BD(bp->tx_prod);
bp->tx_prod_bseq += pkt_size;

REG_WR16(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BIDX, bp->tx_prod);
REG_WR(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BSEQ, bp->tx_prod_bseq);
REG_WR16(bp, bp->tx_bidx_addr, bp->tx_prod);
REG_WR(bp, bp->tx_bseq_addr, bp->tx_prod_bseq);

udelay(100);

Expand Down Expand Up @@ -4529,8 +4542,8 @@ bnx2_start_xmit(struct sk_buff *skb, struct net_device *dev)
prod = NEXT_TX_BD(prod);
bp->tx_prod_bseq += skb->len;

REG_WR16(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BIDX, prod);
REG_WR(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BSEQ, bp->tx_prod_bseq);
REG_WR16(bp, bp->tx_bidx_addr, prod);
REG_WR(bp, bp->tx_bseq_addr, bp->tx_prod_bseq);

mmiowb();

Expand Down

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