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USB: s3c-hsotg: modify only selected bits in S3C_PHYPWR register
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S5PV210 SoCs has 2 USB PHY interfaces, both enabled by writing zero to
S3C_PHYPWR register. HS/OTG driver uses only PHY0, so do not touch bits
related to PHY1.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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Marek Szyprowski authored and Greg Kroah-Hartman committed Aug 10, 2010
1 parent 4d47166 commit 1eb838d
Showing 1 changed file with 4 additions and 2 deletions.
6 changes: 4 additions & 2 deletions drivers/usb/gadget/s3c-hsotg.c
Original file line number Diff line number Diff line change
Expand Up @@ -2801,9 +2801,11 @@ static void __devinit s3c_hsotg_initep(struct s3c_hsotg *hsotg,
static void s3c_hsotg_otgreset(struct s3c_hsotg *hsotg)
{
struct clk *xusbxti;
u32 osc;
u32 pwr, osc;

writel(0, S3C_PHYPWR);
pwr = readl(S3C_PHYPWR);
pwr &= ~0x19;
writel(pwr, S3C_PHYPWR);
mdelay(1);

osc = hsotg->plat->is_osc ? S3C_PHYCLK_EXT_OSC : 0;
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