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yaml
---
r: 182986
b: refs/heads/master
c: d48a41c
h: refs/heads/master
v: v3
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Srinidhi Kasagar authored and Russell King committed Feb 4, 2010
1 parent 1f915ac commit 1fac19d
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2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: e208c447bd728920e4f3d438a706344ea31249b9
refs/heads/master: d48a41c181c8abdb8b09f746e02839c6161dc3ea
75 changes: 75 additions & 0 deletions trunk/arch/arm/mach-ux500/board-mop500.c
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,7 @@
#include <asm/mach/arch.h>

#include <plat/mtu.h>
#include <plat/i2c.h>

#include <mach/hardware.h>
#include <mach/setup.h>
Expand Down Expand Up @@ -120,6 +121,70 @@ static struct amba_device pl031_device = {
.irq = {IRQ_RTC_RTT, NO_IRQ},
};

#define U8500_I2C_RESOURCES(id, size) \
static struct resource u8500_i2c_resources_##id[] = { \
[0] = { \
.start = U8500_I2C##id##_BASE, \
.end = U8500_I2C##id##_BASE + size - 1, \
.flags = IORESOURCE_MEM, \
}, \
[1] = { \
.start = IRQ_I2C##id, \
.end = IRQ_I2C##id, \
.flags = IORESOURCE_IRQ \
} \
}

U8500_I2C_RESOURCES(0, SZ_4K);
U8500_I2C_RESOURCES(1, SZ_4K);
U8500_I2C_RESOURCES(2, SZ_4K);
U8500_I2C_RESOURCES(3, SZ_4K);

#define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, _sm) \
static struct nmk_i2c_controller u8500_i2c_##id = { \
/* \
* slave data setup time, which is \
* 250 ns,100ns,10ns which is 14,6,2 \
* respectively for a 48 Mhz \
* i2c clock \
*/ \
.slsu = _slsu, \
/* Tx FIFO threshold */ \
.tft = _tft, \
/* Rx FIFO threshold */ \
.rft = _rft, \
/* std. mode operation */ \
.clk_freq = clk, \
.sm = _sm, \
}

/*
* The board uses 4 i2c controllers, initialize all of
* them with slave data setup time of 250 ns,
* Tx & Rx FIFO threshold values as 1 and standard
* mode of operation
*/
U8500_I2C_CONTROLLER(0, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
U8500_I2C_CONTROLLER(1, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
U8500_I2C_CONTROLLER(2, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
U8500_I2C_CONTROLLER(3, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);

#define U8500_I2C_PDEVICE(cid) \
static struct platform_device i2c_controller##cid = { \
.name = "nmk-i2c", \
.id = cid, \
.num_resources = 2, \
.resource = u8500_i2c_resources_##cid, \
.dev = { \
.platform_data = &u8500_i2c_##cid \
} \
}

U8500_I2C_PDEVICE(0);
U8500_I2C_PDEVICE(1);
U8500_I2C_PDEVICE(2);
U8500_I2C_PDEVICE(3);

static struct amba_device *amba_devs[] __initdata = {
&uart0_device,
&uart1_device,
Expand All @@ -128,6 +193,14 @@ static struct amba_device *amba_devs[] __initdata = {
&pl031_device,
};

/* add any platform devices here - TODO */
static struct platform_device *platform_devs[] __initdata = {
&i2c_controller0,
&i2c_controller1,
&i2c_controller2,
&i2c_controller3,
};

static void __init u8500_timer_init(void)
{
#ifdef CONFIG_LOCAL_TIMERS
Expand All @@ -152,6 +225,8 @@ static void __init u8500_init_machine(void)
for (i = 0; i < ARRAY_SIZE(amba_devs); i++)
amba_device_register(amba_devs[i], &iomem_resource);

platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));

spi_register_board_info(u8500_spi_devices,
ARRAY_SIZE(u8500_spi_devices));

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