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yaml
---
r: 146849
b: refs/heads/master
c: 6881e8b
h: refs/heads/master
i:
  146847: d51be14
v: v3
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Magnus Damm authored and Paul Mundt committed Jun 1, 2009
1 parent 0cd0501 commit 207fb4f
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Showing 3 changed files with 49 additions and 1 deletion.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 98fbe45bea77c1804eae0e71f27673db1824a2a8
refs/heads/master: 6881e8bf3d86b23dd124134fae113ebd05fae08a
13 changes: 13 additions & 0 deletions trunk/arch/sh/include/asm/clock.h
Original file line number Diff line number Diff line change
Expand Up @@ -117,4 +117,17 @@ long clk_rate_table_round(struct clk *clk,
struct cpufreq_frequency_table *freq_table,
unsigned long rate);

#define SH_CLK_MSTP32(_name, _id, _parent, _enable_reg, \
_enable_bit, _flags) \
{ \
.name = _name, \
.id = _id, \
.parent = _parent, \
.enable_reg = (void __iomem *)_enable_reg, \
.enable_bit = _enable_bit, \
.flags = _flags, \
}

int sh_clk_mstp32_register(struct clk *clks, int nr);

#endif /* __ASM_SH_CLOCK_H */
35 changes: 35 additions & 0 deletions trunk/arch/sh/kernel/cpu/clock-cpg.c
Original file line number Diff line number Diff line change
@@ -1,7 +1,42 @@
#include <linux/clk.h>
#include <linux/compiler.h>
#include <linux/io.h>
#include <asm/clock.h>

static int sh_clk_mstp32_enable(struct clk *clk)
{
__raw_writel(__raw_readl(clk->enable_reg) & ~(1 << clk->enable_bit),
clk->enable_reg);
return 0;
}

static void sh_clk_mstp32_disable(struct clk *clk)
{
__raw_writel(__raw_readl(clk->enable_reg) | (1 << clk->enable_bit),
clk->enable_reg);
}

static struct clk_ops sh_clk_mstp32_clk_ops = {
.enable = sh_clk_mstp32_enable,
.disable = sh_clk_mstp32_disable,
.recalc = followparent_recalc,
};

int __init sh_clk_mstp32_register(struct clk *clks, int nr)
{
struct clk *clkp;
int ret = 0;
int k;

for (k = 0; !ret && (k < nr); k++) {
clkp = clks + k;
clkp->ops = &sh_clk_mstp32_clk_ops;
ret |= clk_register(clkp);
}

return ret;
}

#ifdef CONFIG_SH_CLK_CPG_LEGACY
static struct clk master_clk = {
.name = "master_clk",
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