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yaml --- r: 98152 b: refs/heads/master c: d6c3048 h: refs/heads/master v: v3
git-mirror · Jun 16, 2008 · 23e06bb · 23e06bb
1 parent eaa1106
commit 23e06bb
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Showing 2 changed files with 3 additions and 3 deletions.
diff --git a/[refs] b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: a9ad02bdbb0193203a477bbd0e833adf9fb29ac4
+refs/heads/master: d6c3048cad3c9eb312c070e11fdbea56498255ed
diff --git a/trunk/include/asm-mips/cpu-info.h b/trunk/include/asm-mips/cpu-info.h
@@ -56,15 +56,15 @@ struct cpuinfo_mips {
 	struct cache_desc	tcache;	/* Tertiary/split secondary cache */
 	int			srsets;	/* Shadow register sets */
 	int			core;	/* physical core number */
-#if defined(CONFIG_MIPS_MT_SMTC)
+#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)
 	/*
 	 * In the MIPS MT "SMTC" model, each TC is considered
 	 * to be a "CPU" for the purposes of scheduling, but
 	 * exception resources, ASID spaces, etc, are common
 	 * to all TCs within the same VPE.
 	 */
 	int			vpe_id;  /* Virtual Processor number */
-#endif /* CONFIG_MIPS_MT */
+#endif
 #ifdef CONFIG_MIPS_MT_SMTC
 	int			tc_id;   /* Thread Context number */
 #endif