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yaml
---
r: 242316
b: refs/heads/master
c: e281fca
h: refs/heads/master
v: v3
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Jesse Barnes authored and Chris Wilson committed Mar 23, 2011
1 parent 98b6aef commit 23e504a
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Showing 3 changed files with 6 additions and 6 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 48898b038b69ef4801f0e059026c8f6920684677
refs/heads/master: e281fcaa287fb39ce26d9aa33a716c2a7bb8484e
8 changes: 4 additions & 4 deletions trunk/drivers/gpu/drm/i915/i915_debugfs.c
Original file line number Diff line number Diff line change
Expand Up @@ -892,7 +892,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused)
seq_printf(m, "Render p-state limit: %d\n",
rp_state_limits & 0xff);
seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>
GEN6_CAGF_SHIFT) * 100);
GEN6_CAGF_SHIFT) * 50);
seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
GEN6_CURICONT_MASK);
seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
Expand All @@ -908,15 +908,15 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused)

max_freq = (rp_state_cap & 0xff0000) >> 16;
seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
max_freq * 100);
max_freq * 50);

max_freq = (rp_state_cap & 0xff00) >> 8;
seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
max_freq * 100);
max_freq * 50);

max_freq = rp_state_cap & 0xff;
seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
max_freq * 100);
max_freq * 50);

__gen6_gt_force_wake_put(dev_priv);
} else {
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2 changes: 1 addition & 1 deletion trunk/drivers/gpu/drm/i915/intel_display.c
Original file line number Diff line number Diff line change
Expand Up @@ -6930,7 +6930,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
DRM_ERROR("timeout waiting for pcode mailbox to finish\n");
if (pcu_mbox & (1<<31)) { /* OC supported */
max_freq = pcu_mbox & 0xff;
DRM_DEBUG_DRIVER("overclocking supported, adjusting frequency max to %dMHz\n", pcu_mbox * 100);
DRM_DEBUG_DRIVER("overclocking supported, adjusting frequency max to %dMHz\n", pcu_mbox * 50);
}

/* In units of 100MHz */
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