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yaml
---
r: 324233
b: refs/heads/master
c: 4c2245b
h: refs/heads/master
i:
  324231: 1a9eac1
v: v3
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Gavin Shan authored and Bjorn Helgaas committed Sep 11, 2012
1 parent 6b2be6f commit 24838e8
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Showing 3 changed files with 24 additions and 1 deletion.
2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: c121504e899c19f7e25b4894f616475073876361
refs/heads/master: 4c2245bb5c9c6e9950ee8919b4462dfa77f7a28f
3 changes: 3 additions & 0 deletions trunk/arch/powerpc/include/asm/machdep.h
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Expand Up @@ -214,6 +214,9 @@ struct machdep_calls {
/* Called after scan and before resource survey */
void (*pcibios_fixup_phb)(struct pci_controller *hose);

/* Called during PCI resource reassignment */
resource_size_t (*pcibios_window_alignment)(struct pci_bus *, unsigned long type);

/* Called to shutdown machine specific hardware not already controlled
* by other drivers.
*/
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20 changes: 20 additions & 0 deletions trunk/arch/powerpc/kernel/pci-common.c
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Expand Up @@ -99,6 +99,26 @@ void pcibios_free_controller(struct pci_controller *phb)
kfree(phb);
}

/*
* The function is used to return the minimal alignment
* for memory or I/O windows of the associated P2P bridge.
* By default, 4KiB alignment for I/O windows and 1MiB for
* memory windows.
*/
resource_size_t pcibios_window_alignment(struct pci_bus *bus,
unsigned long type)
{
if (ppc_md.pcibios_window_alignment)
return ppc_md.pcibios_window_alignment(bus, type);

/*
* PCI core will figure out the default
* alignment: 4KiB for I/O and 1MiB for
* memory window.
*/
return 1;
}

static resource_size_t pcibios_io_size(const struct pci_controller *hose)
{
#ifdef CONFIG_PPC64
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