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[PATCH] x86-64: Tighten mce_amd driver MSR reads
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while debugging an unrelated problem in Xen, I noticed odd reads from
non-existent MSRs. Having now found time to look why these happen, I
came up with below patch, which
- prevents accessing MCi_MISCj with j > 0 when the block pointer in
MCi_MISC0 is zero
- accesses only contiguous MCi_MISCj until a non-implemented one is
found
- doesn't touch unimplemented blocks in mce_threshold_interrupt at all
- gives names to two bits previously derived from MASK_VALID_HI (it
took me some time to understand the code without this)

The first three items, besides being apparently closer to the spec, should
namely help cutting down on the time mce_threshold_interrupt() takes.

Signed-off-by: Andi Kleen <ak@suse.de>
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Jan Beulich authored and Andi Kleen committed Feb 13, 2007
1 parent 9b35589 commit 24ce0e9
Showing 1 changed file with 25 additions and 15 deletions.
40 changes: 25 additions & 15 deletions arch/x86_64/kernel/mce_amd.c
Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,8 @@
#define THRESHOLD_MAX 0xFFF
#define INT_TYPE_APIC 0x00020000
#define MASK_VALID_HI 0x80000000
#define MASK_CNTP_HI 0x40000000
#define MASK_LOCKED_HI 0x20000000
#define MASK_LVTOFF_HI 0x00F00000
#define MASK_COUNT_EN_HI 0x00080000
#define MASK_INT_TYPE_HI 0x00060000
Expand Down Expand Up @@ -122,14 +124,17 @@ void __cpuinit mce_amd_feature_init(struct cpuinfo_x86 *c)
for (block = 0; block < NR_BLOCKS; ++block) {
if (block == 0)
address = MSR_IA32_MC0_MISC + bank * 4;
else if (block == 1)
address = MCG_XBLK_ADDR
+ ((low & MASK_BLKPTR_LO) >> 21);
else if (block == 1) {
address = (low & MASK_BLKPTR_LO) >> 21;
if (!address)
break;
address += MCG_XBLK_ADDR;
}
else
++address;

if (rdmsr_safe(address, &low, &high))
continue;
break;

if (!(high & MASK_VALID_HI)) {
if (block)
Expand All @@ -138,8 +143,8 @@ void __cpuinit mce_amd_feature_init(struct cpuinfo_x86 *c)
break;
}

if (!(high & MASK_VALID_HI >> 1) ||
(high & MASK_VALID_HI >> 2))
if (!(high & MASK_CNTP_HI) ||
(high & MASK_LOCKED_HI))
continue;

if (!block)
Expand Down Expand Up @@ -187,17 +192,22 @@ asmlinkage void mce_threshold_interrupt(void)

/* assume first bank caused it */
for (bank = 0; bank < NR_BANKS; ++bank) {
if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
continue;
for (block = 0; block < NR_BLOCKS; ++block) {
if (block == 0)
address = MSR_IA32_MC0_MISC + bank * 4;
else if (block == 1)
address = MCG_XBLK_ADDR
+ ((low & MASK_BLKPTR_LO) >> 21);
else if (block == 1) {
address = (low & MASK_BLKPTR_LO) >> 21;
if (!address)
break;
address += MCG_XBLK_ADDR;
}
else
++address;

if (rdmsr_safe(address, &low, &high))
continue;
break;

if (!(high & MASK_VALID_HI)) {
if (block)
Expand All @@ -206,8 +216,8 @@ asmlinkage void mce_threshold_interrupt(void)
break;
}

if (!(high & MASK_VALID_HI >> 1) ||
(high & MASK_VALID_HI >> 2))
if (!(high & MASK_CNTP_HI) ||
(high & MASK_LOCKED_HI))
continue;

if (high & MASK_OVERFLOW_HI) {
Expand Down Expand Up @@ -385,7 +395,7 @@ static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
return 0;

if (rdmsr_safe(address, &low, &high))
goto recurse;
return 0;

if (!(high & MASK_VALID_HI)) {
if (block)
Expand All @@ -394,8 +404,8 @@ static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
return 0;
}

if (!(high & MASK_VALID_HI >> 1) ||
(high & MASK_VALID_HI >> 2))
if (!(high & MASK_CNTP_HI) ||
(high & MASK_LOCKED_HI))
goto recurse;

b = kzalloc(sizeof(struct threshold_block), GFP_KERNEL);
Expand Down

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