ARM: dts: Fix missing GPMC NAND device width for omap3 boards

Looks like we have some GPMC NAND timings missing device width. This fixes "gpmc_cs_program_settings: invalid width 0!" errors during boot. Signed-off-by: Tony Lindgren <tony@atomide.com>
git-mirror · Nov 4, 2014 · 24f284a · 24f284a
1 parent 13aec8e
commit 24f284a
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diff --git a/arch/arm/boot/dts/omap3-evm-37xx.dts b/arch/arm/boot/dts/omap3-evm-37xx.dts
@@ -161,6 +161,7 @@
 		linux,mtd-name= "hynix,h8kds0un0mer-4em";
 		reg = <0 0 4>;	/* CS0, offset 0, IO size 4 */
 		nand-bus-width = <16>;
+		gpmc,device-width = <2>;
 		ti,nand-ecc-opt = "bch8";
 
 		gpmc,sync-clk-ps = <0>;

diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -204,6 +204,7 @@
 		linux,mtd-name= "micron,mt29c4g96maz";
 		reg = <0 0 4>;	/* CS0, offset 0, IO size 4 */
 		nand-bus-width = <16>;
+		gpmc,device-width = <2>;
 		ti,nand-ecc-opt = "bch8";
 
 		gpmc,sync-clk-ps = <0>;

diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts
@@ -61,6 +61,7 @@
 		linux,mtd-name= "micron,mt29c4g96maz";
 		reg = <0 0 4>;	/* CS0, offset 0, IO size 4 */
 		nand-bus-width = <16>;
+		gpmc,device-width = <2>;
 		ti,nand-ecc-opt = "bch8";
 
 		gpmc,sync-clk-ps = <0>;

diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts
@@ -103,6 +103,7 @@
 		linux,mtd-name= "micron,nand";
 		reg = <0 0 4>;	/* CS0, offset 0, IO size 4 */
 		nand-bus-width = <16>;
+		gpmc,device-width = <2>;
 		ti,nand-ecc-opt = "bch8";
 
 		gpmc,sync-clk-ps = <0>;